M. Garcia-Bosque, Guillermo Díez-Señorans, C. Sánchez-Azqueta, S. Celma
{"title":"Introduction to Physically Unclonable Fuctions: Properties and Applications","authors":"M. Garcia-Bosque, Guillermo Díez-Señorans, C. Sánchez-Azqueta, S. Celma","doi":"10.1109/ECCTD49232.2020.9218404","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218404","url":null,"abstract":"During the last years, Physically Unclonable Functions (PUFs) have become a very important research area in the field of hardware security due to their capability of generating volatile secret keys as well as providing a low-cost authentication. In this paper, an introduction to Physically Unclonable Functions is given, including their definition, properties and applications. Finally, as an example of how to design a PUF, the general structure of a ring oscillator PUF is presented.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121856739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Synergetic Algorithm for Power-Down Synthesis","authors":"M. Neuner, H. Graeb","doi":"10.1109/ECCTD49232.2020.9218442","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218442","url":null,"abstract":"This paper presents a new approach to describe the analog power-down synthesis problem by combining two state-of-the art constraint programs to a unified, homogeneous constraint optimization problem that, in contrast to the previous approach, allows trade-offs between the two design goals \"matching\" and \"area\". Furthermore, enhanced symmetry constraints are incorporated by the new method. Experimental results show the efficacy of the proposed method.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129091589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the Development of MCU-based ad hoc HW Interface Circuitry for Memristor Characterization","authors":"Robinson De La Fuente, I. Vourkas, M. Pérez","doi":"10.1109/ECCTD49232.2020.9218418","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218418","url":null,"abstract":"The evolution of resistive switching device (memristor) technology during the last ten years has shown the great potential of such emerging nanoelectronic devices in several potential applications, ranging from memory to computing and sensing. As memristor technology is continuously maturing, more devices become commercially available and thus accessible to investigators working on relevant research topics, as well as to university teaching labs and academics who wish to incorporate memristor-related experiments in their classrooms. However, experimental work on circuits with memristors requires particular caution and supervision, given that such devices are both highly sensitive (i.e., can easily burn out) and still quite expensive compared to other discrete circuit components. In this context, the development of integrated instrumentation solutions that provide a safe way to experimental work with memristors is becoming increasingly relevant, and some such tools have already reached the market. In this direction, we present some early results from our experience on the design and development of an instrumentation printed circuit board (PCB), designed to provide an ad hoc low-cost solution for measurements on memristors. The driving circuitry on the PCB is interfaced through a microcontroller-based system, providing easy programming and acquisition for a variety of measurements.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123965583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Physical Security of Ring-based PUF","authors":"L. Bossuet","doi":"10.1109/ECCTD49232.2020.9218378","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218378","url":null,"abstract":"The design of a secure, efficient, lightweight silicon physical unclonable function (PUF) is a serious challenge for the hardware security community. In this context, this paper presents a survey of physical attacks targeting ring-based PUFs because such PUFs are known as some of the more efficient. The paper discuss the threats and try to propose solution to design efficient and secure ring-based silicon PUFs.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114785227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fast leak localization based on acoustic signal attenuation for pipelines in high-noise environment","authors":"Georgios-Panagiotis Kousiopoulos, S. Nikolaidis","doi":"10.1109/ECCTD49232.2020.9218320","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218320","url":null,"abstract":"Pipeline networks are being used worldwide for a variety of reasons. A major problem that poses an obstacle to the safe and normal operation of a pipeline network is the occurrence of leaks. In the past years a large number of leak localization methods have been developed and they have presented appreciable accuracy in the estimation of the leak position. However, apart from the accuracy of such a method, another important factor is the amount of time needed for a system implementing this method to provide results, which is a topic rarely encountered in the literature. In this article a leak localization method based on the attenuation of acoustic leak signals propagating in a pipeline is presented. The minimum duration of the measurements needed for avoiding accuracy degradation is determined. By this approach accurate results in shorter time than the traditional time-delay estimation methods are achieved. Furthermore, since the proposed method is designed for the environment of an oil refinery, its efficiency is also tested under high-noise conditions and the corresponding results are provided.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123997478","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. H. Jaafar, A. Gee, A. O. Hamza, Charlotte J. Eling, J. Bouillard, A. Adawi, N. Kemp
{"title":"Evidence of Nanoparticle Migration in Polymeric Hybrid Memristor Devices","authors":"A. H. Jaafar, A. Gee, A. O. Hamza, Charlotte J. Eling, J. Bouillard, A. Adawi, N. Kemp","doi":"10.1109/ECCTD49232.2020.9218360","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218360","url":null,"abstract":"We report evidence of possible migration of metal nanoparticles in nanoparticle-polymer memristor devices. In bi-layer devices, having a bottom layer containing a mixed nanoparticle polymer blend and a top layer of just the polymer, the light emission from a fluorescent dye in the bottom layer was observed to change during the application of an electric potential. Control of the fluorescence emission by changing the magnitude and direction of the applied voltage support a mechanism of electric field induced migration of metal nanoparticles from the bottom into the top layer. Potential applications as switches and displays in optoelectronics are also briefly discussed.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128122743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Ascoli, I. Messaris, A. S. Demirkol, R. Tetzlaff, L. Chua, D. Biolek, V. Biolková, Z. Kolka
{"title":"Implementation of Logical and Memory Functions with Memristor Cellular Nonlinear Networks","authors":"A. Ascoli, I. Messaris, A. S. Demirkol, R. Tetzlaff, L. Chua, D. Biolek, V. Biolková, Z. Kolka","doi":"10.1109/ECCTD49232.2020.9218420","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218420","url":null,"abstract":"The peculiar combined capability of nonvolatile resistance switching memories to store and process data within a common nanoscale physical medium allows to implement disruptive mem-computing paradigms in hybrid circuits leveraging the compatibility of CMOS and memristive technologies. This may pave the way toward the future development of minaturized, lightweight, ultra-dense, high-speed and low-power universal memcomputers with sensing functionality on board. Since the availability of technical products of this kind would respond to the current demands of the Internet-of-Things industry, it is timely to investigate the functionalities and limitations of memristive memcomputing structures, such as those arranged in cellular bio-inspired architectures. The adoption of memristors in circuit design brings new life to nonlinear system theory, since standard analysis and synthesis techniques from linear system theory are no longer applicable for the investigation of highly-nonlinear electronic systems. This paper demonstrates how the use of standard and novel concepts from nonlinear system theory allow to design a Memristor Cellular Nonlinear Network for the execution of pixel-wise logical boolean functions on binary images, and the concurrent storage of input or output data into the memristive memory bank, providing clear evidence for the truly mem-computing character of its memristor-centered signal processing paradigm.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121706612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"General Information","authors":"","doi":"10.1109/ecctd49232.2020.9218363","DOIUrl":"https://doi.org/10.1109/ecctd49232.2020.9218363","url":null,"abstract":"","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132021077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wedge Filters Designed From 1D Digital Prototypes","authors":"R. Matei","doi":"10.1109/ECCTD49232.2020.9218422","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218422","url":null,"abstract":"This work proposes an efficient analytic method for designing a class of 2D filters useful in image processing, namely wedge-shaped filters, which can be considered components of a directional filter bank. The design starts from a 1D digital filter prototype transfer function. Using accurate approximations and specific frequency mappings, first an unilateral, half-plane filter with a given orientation is obtained. Using two such unilateral 2D filters with imposed orientation angles, a desired directional wedge filter is derived, with specified orientation and aperture angles. Its transfer function results directly in a factored form, which is an advantage in implementation. The resulted wedge filter is parametric and tunable, since the specified parameters occur in the final matrix form of the filter transfer function.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114807460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of Low-Temperature and Radiation-Hardened JFET Direct Coupled Op-Amps without Current Mirrors","authors":"A. Bugakova, N. Prokopenko, A. Titov","doi":"10.1109/ECCTD49232.2020.9218291","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218291","url":null,"abstract":"The offset voltage (Voff) of the BJT and CMOS two-stage operational amplifiers (Op-Amps) substantially depends on the numerical values (differences from unit) from the current ratio (Ki≈1) of the current mirrors (CM). The CM parameter is also influenced by the Early voltage of their dominant active components. For the JFET technologies (Si, SiC, GaAs and others) with a low noise level, there are no high-quality CMs of this class today, or their construction (at Ki=1) is associated with a significant deterioration of other parameters of the Op-Amp. Nowadays, the current JFET mirrors are the weakest link in modern JFET analog circuitry and it is impractical to use them in the structure of the JFET Op-Amps. For the first time the article poses and solves the problem of determining the conditions for exclusion of the CMs in the JFET Op-Amp for the case when it is necessary to obtain a small Voff. It is shown that for this, three identical reference current sources should be used, which are implemented on the JFET transistors and the local negative feedback resistors. The Voff of the Op-Amps with the classical and proposed architectures are compared. The computer simulation results of the offset voltage (Voff) in the LTspice environment are presented, which show that silicon JFet direct coupled Op-Amps without CM have a systematic component of Voff at the level of tens to hundreds of microvolts and voltage gain of more than 80 dB in a wide temperature range.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114824247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}