{"title":"Input design for controlling dynamics in a second-order memristive circuit","authors":"M. D. Marco, M. Forti, G. Innocenti, A. Tesi","doi":"10.1109/ECCTD49232.2020.9218368","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218368","url":null,"abstract":"The paper considers the problem of controlling the dynamics of a circuit composed by a memristor connected to a two-terminal element containing R, L, C components and two independent sources acting as control inputs. The dynamics of the input-less circuit is first investigated by characterizing the attractors lying on the infinitely many invariant manifolds of the circuit state space. Then, both the problems of steering within a prescribed time interval the dynamics from one manifold to another (i.e., switching among different attractors), and of modifying the dynamics onto each invariant manifold are solved via suitably designing the control sources. Some numerical examples are presented for illustration purposes.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129960395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Srisubha Kalanadhabhatta, Kiran Kumar Anumandla, S. S. Khursheed, A. Acharyya
{"title":"Secure Scan Design with a Novel Methodology of Scan Camouflaging","authors":"Srisubha Kalanadhabhatta, Kiran Kumar Anumandla, S. S. Khursheed, A. Acharyya","doi":"10.1109/ECCTD49232.2020.9218406","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218406","url":null,"abstract":"Scan based attacks are the major security concerns of a design. These attacks are majorly employed to understand the camouflaged logic during reverse engineering. The state- of-the-art techniques like scan chain scrambling hinder accessibility of scan chains, but are prone to layout level reverse engineering attacks. In the proposed methodology, the scan design is secured by adding an extra scan input port (DSI) to the flipflop using dummy contacts, which ensure that DSI cannot be distinguished from SI port even with layout based reverse engineering techniques. Dummy scan chain connections are introduced in the design by connecting DSI port to the nearby flipflop Q output port. Our proposed method can withstand Reset-and-scan attack, Incremental SAT-based attack and the recent ScanSAT attack. The performance of this concept is measured in terms of frequency and total power consumption on IWLS-2005 benchmark circuits having up to 1380 flipflops with 40nm technology library. The delay is effected by a maximum of 2.2% with 50% obfuscation without any impact on power, pattern generation time and scan test time.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121072921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Time-division chopper amplifier suitable for acquisition of plural biological signals","authors":"Takahide Sato, Shintaro Motoki, S. Ogawa","doi":"10.1109/ECCTD49232.2020.9218282","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218282","url":null,"abstract":"A chopper amplifier suitable for biological signal processing in a time division manner which amplifies a plurality of input signals is proposed. Since biological signals are very low frequency signals, a chopper amplifier which has low 1/f noise is used. Furthermore, the amplifier has a highpass characteristic in order to remove the DC voltage contained in the signals obtained from the sensor. A method to remove the DC voltage accurately and quickly using DC voltage holding capacitors and voltage buffers is proposed. HSPICE simulation results show that the proposed 4-input circuit reduces the chip area by 26% and the power consumption by 29% compared to the conventional circuit.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131200458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Efficient Implementation of Memristor Cellular Nonlinear Networks using Stochastic Computing","authors":"O. Camps, S. Stavrinides, R. Picos","doi":"10.1109/ECCTD49232.2020.9218298","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218298","url":null,"abstract":"Cellular Nonlinear Networks (CNN) were intro-duced by Leon Chua and Lin Yang in 1988, and are shown to be a very powerful parallel computing architecture. Later on, CNN have been designed using the processing and memory capabilities of memristors. On the other hand, Stochastic Computing (SC) has been proposed as a way to reduce the number of processing elements in a circuits. In this work, we propose using SC to implement a CNN. Specifically, we choose a memristor-based CNN, where all the operations are done using SC. As an example of application, we have used Matlab to create a CNN that performs edge detection on 512x512 grey-scale images. Results show excellent capability, while at the same time the low number of needed elements will allow to implement it in a low cost FPGA-based system.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"71 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132241331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Closed-Form Design of 2D Filters with Elliptical and Circular Frequency Response","authors":"R. Matei","doi":"10.1109/ECCTD49232.2020.9218349","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218349","url":null,"abstract":"An analytical design procedure is described in this paper for a type of 2D recursive filter, with a frequency response elliptical or circular in shape. The design is based on a specially determined frequency mapping, applied to an digital prototype filter. This analytical design approach yields the transfer function of the desired 2D filter in a factored, closed form. Some efficient, accurate approximations are used, like Chebyshev-Padé method, without resorting to global optimization algorithms. The filter matrices are a convolution of smaller size matrices, an obvious advantage in implementation. Moreover, the obtained filter is tunable, since its coefficients depend on the specified orientation and bandwidth. As proven by given design examples, these 2D filters have a precise shape, with negligible distortions even near the margins of frequency plane, good selectivity and low order.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"15 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113960265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vassilis Alimisis, Marios Gourdouparis, Christos Dimas, P. Sotiriadis
{"title":"Implementation of Fractional-order Model of Nickel-Cadmium Cell using Current Feedback Operational Amplifiers","authors":"Vassilis Alimisis, Marios Gourdouparis, Christos Dimas, P. Sotiriadis","doi":"10.1109/ECCTD49232.2020.9218311","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218311","url":null,"abstract":"This work proposes an integrated-circuit architecture emulating a standard fractional-order model of NickelCadmium cell for computer simulating electrochemical behavior. The architecture is based on fractional-order elements implemented with both active and passive components, offering an accurate transfer function behavior up to 250Hz. It consists of a reduced number of active elements and implements analog allpass filters coupled with a current conveyor. Performance and accuracy of the proposed architecture is confirmed via Monte-Carlo analysis. The proposed circuitry has been designed in TSMC 90nm CMOS process and simulated using the Cadence IC suite.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126386585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Memristor based Oscillators with Controlled Threshold Parameters","authors":"V. Rakitin, S. Rusakov","doi":"10.1109/ECCTD49232.2020.9218413","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218413","url":null,"abstract":"The principle of controlling threshold parameters in memristor based oscillators circuit is discussed. The new control approach using two-threshold comparators is considered. It is shown that capabilities of memristor oscillators with control thresholds are sufficient for constructing the simplest elements of oscillatory computing architectures. The results of oscillator simulation confirm these capabilities.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128535046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Template Optimization in Cellular Neural Networks Using Gradient Based Approaches","authors":"András Fülöp, A. Horváth","doi":"10.1109/ECCTD49232.2020.9218304","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218304","url":null,"abstract":"Cellular neural networks were used with success in the past decades and helped laying the foundations of neural net-work applications in image processing. In the last few years convolutional networks have appeared and helped in the solution of complex practical problems. Meanwhile programming templates of cellular neural networks were designed by analytical methods, gradient based optimization is applied popularly in convolutional networks. In this paper we will demonstrate how these methods can be exploited using cellular networks and how they can be used to implement classification and feature extraction tasks, both with standard and memristive cell dynamics.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130384360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Arul, N. Anagnostopoulos, Sergej Reissig, S. Katzenbeisser
{"title":"A Study of the Spatial Auto-Correlation of Memory-Based Physical Unclonable Functions","authors":"T. Arul, N. Anagnostopoulos, Sergej Reissig, S. Katzenbeisser","doi":"10.1109/ECCTD49232.2020.9218302","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218302","url":null,"abstract":"In this work, we examine the spatial auto-correlation exhibited in the responses of memory-based Physical Unclonable Functions (PUFs). In particular, we examine the responses of an SRAM PUF, a DRAM decay-based PUF, and a disturbance-based Flash PUF. For the evaluation, we use three different metrics that have already been employed in the relevant literature for measuring the spatial correlation of other PUF responses. Our results prove that the examined PUF responses exhibit little, if any, spatial auto-correlation. Thus, these PUFs can be considered as security mechanisms of high entropy, which can be utilised to enhance the security of the Internet of Things (IoT).","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132593494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the Performance Improvement of OTA in Sub-Threshold Region with Dual Supply","authors":"Ersin Alaybeyoğlu, H. Kuntman","doi":"10.1109/ECCTD49232.2020.9218273","DOIUrl":"https://doi.org/10.1109/ECCTD49232.2020.9218273","url":null,"abstract":"Performance improvement of symmetrical OTA (Operational Transconductance Amplifier) designed with DTMOS transistors in sub-threshold region is presented in this work. The improvement of Gm, noise and dynamic range is realized with double supply voltage. On the other hand, double supply improves f-3dB (cut-off frequency), Gm (transconductance), THD (total harmonic distortion) of designed OTA-C filter. The proposed method is tested through four cases. The proposed technique has been simulated with 0.18μm TSMC process in Cadence environment.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"2 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132119035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}