{"title":"Time-division chopper amplifier suitable for acquisition of plural biological signals","authors":"Takahide Sato, Shintaro Motoki, S. Ogawa","doi":"10.1109/ECCTD49232.2020.9218282","DOIUrl":null,"url":null,"abstract":"A chopper amplifier suitable for biological signal processing in a time division manner which amplifies a plurality of input signals is proposed. Since biological signals are very low frequency signals, a chopper amplifier which has low 1/f noise is used. Furthermore, the amplifier has a highpass characteristic in order to remove the DC voltage contained in the signals obtained from the sensor. A method to remove the DC voltage accurately and quickly using DC voltage holding capacitors and voltage buffers is proposed. HSPICE simulation results show that the proposed 4-input circuit reduces the chip area by 26% and the power consumption by 29% compared to the conventional circuit.","PeriodicalId":336302,"journal":{"name":"2020 European Conference on Circuit Theory and Design (ECCTD)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD49232.2020.9218282","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A chopper amplifier suitable for biological signal processing in a time division manner which amplifies a plurality of input signals is proposed. Since biological signals are very low frequency signals, a chopper amplifier which has low 1/f noise is used. Furthermore, the amplifier has a highpass characteristic in order to remove the DC voltage contained in the signals obtained from the sensor. A method to remove the DC voltage accurately and quickly using DC voltage holding capacitors and voltage buffers is proposed. HSPICE simulation results show that the proposed 4-input circuit reduces the chip area by 26% and the power consumption by 29% compared to the conventional circuit.