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2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)最新文献

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Polarization influence on conductivity 极化对电导率的影响
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939710
Y. Poplavko, A. Borisov
{"title":"Polarization influence on conductivity","authors":"Y. Poplavko, A. Borisov","doi":"10.1109/ELNANO.2017.7939710","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939710","url":null,"abstract":"Electronic sensors and controlling devices widely use specific materials, in which electrical resistance can be changed many times under the influence of external factors: temperature, pressure, electrical field, moisture and even smell. In the report, a principal mechanism is examined: how electrical polarization can affect the conductivity in different crystals. Understanding of physical nature of polarity influence on charge transfer is important to improve parameters of related materials.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116573542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Write-back technique for single-ended 7T SRAM cell 单端7T SRAM单元的回写技术
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939728
Vazgen Melikyan, A. Avetisyan, D. Babayan, Karo H. Safaryan, Tigran Hakhverdyan
{"title":"Write-back technique for single-ended 7T SRAM cell","authors":"Vazgen Melikyan, A. Avetisyan, D. Babayan, Karo H. Safaryan, Tigran Hakhverdyan","doi":"10.1109/ELNANO.2017.7939728","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939728","url":null,"abstract":"This paper presents the new Write-Back scheme, which solve the half-select operation problem and faster than conventional Write-Back technique for memory array with seven-transistor (7T) single-ended static random access memory (SE-SRAM) bit cell. Data in the cells are sensitive and flipping can happen, so proposed scheme improves the stability issue for half-selected cells without performance degradation.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129872583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On-chip decoupling capacitor optimization technique 片上去耦电容优化技术
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939729
Sh. Melikyan Vazgen, H. S. Karo, V. Avetisyan, A. T. Hakhverdyan
{"title":"On-chip decoupling capacitor optimization technique","authors":"Sh. Melikyan Vazgen, H. S. Karo, V. Avetisyan, A. T. Hakhverdyan","doi":"10.1109/ELNANO.2017.7939729","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939729","url":null,"abstract":"On-chip decoupling capacitors used for reducing power supply noise. In this paper, a design technique for sizing and placing on-chip decoupling cells based on circuits switching activity is proposed. Evaluation of this methods on Universal Serial Bus Test Chip power and USB TC with new power structure indicates that the same approach of decoupling capacitors placement in different power structure can produce up to 30 percent improvement in power supply noise level.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124727050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The new formula for apparent power and power losses of three-phase four-wire system 三相四线制系统视在功率和功率损耗的新公式
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939784
M. Artemenko, L. M. Batrak
{"title":"The new formula for apparent power and power losses of three-phase four-wire system","authors":"M. Artemenko, L. M. Batrak","doi":"10.1109/ELNANO.2017.7939784","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939784","url":null,"abstract":"The new formula of the apparent power, which takes into account the power losses of the neutral conductor, has been compared with standardized one and conditions of their equivalency were found. A new physical sense of apparent power was established, it is a geometric mean value of power losses and reverse short-circuit power of supply system. The energy saving advantages of new control strategy of shunt active filter based on new determining of apparent power were shown. Analytical condition for the energy feasibility of a shunt active filter to increase the efficiency of the power system has been derived.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120844375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Optimization of the grating-based structures for the efficient SERS substrates 高效SERS基板的光栅结构优化
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939730
I. Yaremchuk, H. Petrovska, Iryna Karelko, V. Fitio, Y. Bobitski
{"title":"Optimization of the grating-based structures for the efficient SERS substrates","authors":"I. Yaremchuk, H. Petrovska, Iryna Karelko, V. Fitio, Y. Bobitski","doi":"10.1109/ELNANO.2017.7939730","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939730","url":null,"abstract":"In work a results of optimization grating-based structures for surface-enhanced Raman spectroscopy (SERS) substrates are presented. Optimized substrates on base of rectangular metal/dielectric and metal/metal grating-based structures have a SERS sensitivity of about 104-105 for some different molecules. There is strong dependence of the maximum of enhanced SERS signals for given wavelength on certain gratings period, depth and filling factor, which corresponds to local surface plasmon resonance at metallic interface.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126118295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
MATLAB model for simulating transmission and reception of meteorological images in the low-rate picture transmission forma MATLAB模型用于模拟低速率图像传输形式下气象图像的发送和接收
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939802
Hu Mijia, Liu Linfeng, V. Shulgin
{"title":"MATLAB model for simulating transmission and reception of meteorological images in the low-rate picture transmission forma","authors":"Hu Mijia, Liu Linfeng, V. Shulgin","doi":"10.1109/ELNANO.2017.7939802","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939802","url":null,"abstract":"Developing and studying modern radio systems is hardly possible without the creation and research of their mathematical models. This paper discusses a complete MATLAB model, including the formation, transmission and reception of the Earth's surface and atmosphere images, obtained by low-orbit meteorological satellites in the digital low-rate picture transmission (LRPT) format. Using models enables us to simplify and accelerate the development, and study of methods and algorithms for digital transmission and reception of satellite images, without installing antennas, hardware of receiving and computer software for direct reception of the satellite signals. The model contains the following procedures: forming the original image data, compressing them using a modified Joint Photographic Experts Group (JPEG) algorithm, forming digital packets, encoding them with Reed-Solomon code, scrambling and convolutional encoding, performing Quadrature Phase Shift Keying (QPSK) modulation and transmitting over a channel with interference. In the receiving part of the model, QPSK demodulation is realized, along with all necessary operations for successive decoding, decompression, and restoration of the image.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130754895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On design of cache with efficient soft error protection 具有高效软错误保护的高速缓存设计
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939719
Olga V. Mamoutova, Alexander P. Antonov, Alexey S. Filippov
{"title":"On design of cache with efficient soft error protection","authors":"Olga V. Mamoutova, Alexander P. Antonov, Alexey S. Filippov","doi":"10.1109/ELNANO.2017.7939719","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939719","url":null,"abstract":"For critical aerospace applications that experience a high intensity of single event upsets, the cache of a processor has to be protected against soft errors. This poses a challenge for cache design, since implemented redundancy causes timing and performance degradation of a processor. Sound design decisions should be made based on evaluations at every design stage. In this paper we present a platform-oriented design methodology for evaluation of processor vulnerability to soft errors in cache. Results of complex design evaluation for vulnerability, timing and chip area for an FPGA-based design of a typical RISC processor with first level instruction and data caches are presented as well.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121374585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The method and the program of automated synthesis of thermal control systems of microelectronic devices 介绍了微电子器件热控制系统自动合成的方法和程序
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939714
I. Y. Gromov, A. M. Kozhevnikov, I. Romanova
{"title":"The method and the program of automated synthesis of thermal control systems of microelectronic devices","authors":"I. Y. Gromov, A. M. Kozhevnikov, I. Romanova","doi":"10.1109/ELNANO.2017.7939714","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939714","url":null,"abstract":"This paper presents a description of the method of automated parametric and structural optimization of systems for ensuring thermal regime of microelectronic devices using modern information technologies.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115474761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low-complexity high-speed soft-hard decoding for turbo-product codes 涡轮产品码的低复杂度高速软硬解码
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939798
Yaroslav M. Krainyk, V. Perov, M. Musiyenko
{"title":"Low-complexity high-speed soft-hard decoding for turbo-product codes","authors":"Yaroslav M. Krainyk, V. Perov, M. Musiyenko","doi":"10.1109/ELNANO.2017.7939798","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939798","url":null,"abstract":"Combined (soft-hard) method for decoding block turbo-product codes is proposed in the paper. The method allows leveraging advantages of soft input data usage with the speed of hard-decoding procedure. The main peculiarity of the method is rule-based decoding stage. The proposed approach simplifies calculation procedure and reaches better correction ability than hard-decision decoder. Mathematical model of investigated method has been tested with the set of codes based on product of extended Hamming codes. Testing has confirmed correctness of the combined decoding method.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121011834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A new approach of multi voltage and adaptive voltage scaling techniques for 16 nm FinFET RISC processor 一种用于16nm FinFET RISC处理器的多电压和自适应电压缩放技术新方法
2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO) Pub Date : 2017-04-18 DOI: 10.1109/ELNANO.2017.7939732
D. Babayan, E. Babayan, Sevak Antonyan, Ani Salmasyan, E. Kagramanyan, A. Avetisyan
{"title":"A new approach of multi voltage and adaptive voltage scaling techniques for 16 nm FinFET RISC processor","authors":"D. Babayan, E. Babayan, Sevak Antonyan, Ani Salmasyan, E. Kagramanyan, A. Avetisyan","doi":"10.1109/ELNANO.2017.7939732","DOIUrl":"https://doi.org/10.1109/ELNANO.2017.7939732","url":null,"abstract":"Currently in deep sub-micron technologies such as 16 nm and smaller, requirement of portable devices focus designers' attention on low power design of CMOS circuits and systems, using different low power techniques, trying to decrease dynamic and/or leakage power. One of the widely employed power optimization methods is multi voltage design, used to reduce power by dividing IC into voltage IC domains. This paper presents a new approach of multi voltage design technique, generalizing it, to use “n” voltage domains with “n” different supply voltages, providing efficient power reduction of digital systems such as processor. Basically, voltage areas match sub modules of processor with addition of modified version of adaptive voltage scaling.","PeriodicalId":333746,"journal":{"name":"2017 IEEE 37th International Conference on Electronics and Nanotechnology (ELNANO)","volume":"305 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132348327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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