发布求助
文献互助 智能选刊 最新文献

Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)最新文献

筛选
英文 中文
Strained Si and the future direction of CMOS 应变Si和CMOS的未来方向
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.99
S. Thompson
{"title":"Strained Si and the future direction of CMOS","authors":"S. Thompson","doi":"10.1109/IWSOC.2005.99","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.99","url":null,"abstract":"Uniaxial process induced strain is being adopted in all 90, 65, and 45 nm high performance logic technologies. Uniaxial strain offers large performance improvement at low cost and minimally increased manufacturing complexity and is scalable to future technology nodes.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122860583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A structure based clustering algorithm with applications to VLSI physical design 一种基于结构的聚类算法及其在VLSI物理设计中的应用
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.29
Jianhua Li, L. Behjat, B. Schiffner
{"title":"A structure based clustering algorithm with applications to VLSI physical design","authors":"Jianhua Li, L. Behjat, B. Schiffner","doi":"10.1109/IWSOC.2005.29","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.29","url":null,"abstract":"Clustering plays an important role in VLSI physical design. In this paper, we present a new structure and connectivity based clustering algorithm. The proposed clustering algorithm emphasizes capturing natural circuit clusters, i.e., highly interconnected cell groups. We apply the proposed clustering algorithm to 2-way and k-way partitionings on ISPD98 benchmark suite as stated in C. J. Alpert (1998), and 2-way partitioning to part of ISPD2005 benchmark suite based in G.-J. Nam et al. (2005). The experimental results show that the proposed clustering algorithm can maintain the partitioning solution qualities while reducing the sizes of large scale circuits.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117301625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Power saving of a dynamic width controller for a monolithic current-mode CMOS DC-DC converter 单片电流型CMOS DC-DC变换器动态宽度控制器的节能研究
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.93
Hung-Ch Lee, Kuo-Tai Chang, Ke-Horng Chen, Wen Tsao Chen
{"title":"Power saving of a dynamic width controller for a monolithic current-mode CMOS DC-DC converter","authors":"Hung-Ch Lee, Kuo-Tai Chang, Ke-Horng Chen, Wen Tsao Chen","doi":"10.1109/IWSOC.2005.93","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.93","url":null,"abstract":"We propose the dynamic power MOS width controlling technique and the adaptive gate driver voltage technique to find out the better approach to power saving in DC-DC converters. It demonstrates that the dynamic power MOS width controlling technique has much improvement in power consumption than that of the adaptive gate driver voltage technique when the load current is heavy or light. After the dynamic power MOS width modification, the simulation results show that the efficiency of current-mode DC-DC buck converter can be improved from 92% to about 98% in heavy load and from 15% to about 16.3% in light load. However, the adaptive gate driver voltage technique has only little improvement of power saving. It means that the dynamic width controller is the better approach to power saving in the DC-DC converter.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131745231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Noise analysis of a CMOS active pixel sensor for tomographic mammography 乳腺断层摄影CMOS有源像素传感器的噪声分析
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.86
M. Izadi, K. Karim
{"title":"Noise analysis of a CMOS active pixel sensor for tomographic mammography","authors":"M. Izadi, K. Karim","doi":"10.1109/IWSOC.2005.86","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.86","url":null,"abstract":"Crystalline silicon (c-Si) technology is attractive for advanced large area imaging applications because of higher transistor mobility, smaller feature sizes and higher density of integration. In particular, for advanced mammography modalities such as tomosynthesis, c-Si is ideally suited to develop the high performance circuitry required for higher contrast, lower noise, and lower X-ray dose, while providing high resolution pixels. We present a voltage-mediated active pixel sensor (APS) with a focus on large area, diagnostic medical X-ray tomographic mammography. System level noise calculations indicate that CMOS technology can meet the stringent noise and area requirements required for tomographic mammography.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129242221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Evolution of bootstrap techniques in low-voltage CMOS digital VLSI circuits for SOC applications 用于SOC应用的低压CMOS数字VLSI电路中自举技术的发展
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.59
J. Kuo
{"title":"Evolution of bootstrap techniques in low-voltage CMOS digital VLSI circuits for SOC applications","authors":"J. Kuo","doi":"10.1109/IWSOC.2005.59","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.59","url":null,"abstract":"This paper reports the evolution of the bootstrap techniques in low-voltage CMOS digital VLSI circuits in the past. Combining bootstrap and DTMOS techniques, low-voltage CMOS digital VLSI circuits using a very low power supply voltage such as 0.5V have been developed for low-power SOC applications.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"171 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131605813","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Life-inspired systems: assuring quality in the era of complexity 以生命为灵感的系统:在复杂的时代保证质量
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.79
L. Józwiak
{"title":"Life-inspired systems: assuring quality in the era of complexity","authors":"L. Józwiak","doi":"10.1109/IWSOC.2005.79","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.79","url":null,"abstract":"The recent spectacular progress in modern microelectronics that enabled implementation of a complete complex system on a single chip created new important opportunities, but also new serious difficulties. This paper aims at a brief analysis of the situation, trends and problems in the field of the modern microelectronic-based systems, and discussion of the paradigms of life-inspired systems and quality-driven design that seem to be adequate to overcome the difficulties.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"123 8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124648664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Logic circuit design based on MOS-NDR devices and circuits fabricated by CMOS process 基于MOS-NDR器件和CMOS工艺电路的逻辑电路设计
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.80
K. Gan, Dong-Shong Liang, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Y. Chen, Shun-Huo Kuo, Chi-Pin Chen
{"title":"Logic circuit design based on MOS-NDR devices and circuits fabricated by CMOS process","authors":"K. Gan, Dong-Shong Liang, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Y. Chen, Shun-Huo Kuo, Chi-Pin Chen","doi":"10.1109/IWSOC.2005.80","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.80","url":null,"abstract":"We propose a new MOS-NDR device that is composed of the metal-oxide-semiconductor field-effect- transistor (MOS) devices. This device could exhibit the negative differential resistance (NDR) characteristics in the current-voltage characteristics by suitably modulating the MOS parameters. We design a logic circuit which can operate the inverter, NOR, and NAND gates. The devices and circuits are fabricated by the standard 0.35/spl mu/m CMOS process.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121851442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Low power Bluetooth for headset applications 低功耗蓝牙耳机应用
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.82
C. Cojocaru
{"title":"Low power Bluetooth for headset applications","authors":"C. Cojocaru","doi":"10.1109/IWSOC.2005.82","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.82","url":null,"abstract":"Bluetooth headsets demand high radio performance at extreme low power consumption. A Bluetooth (BT) transceiver implemented in a 0.5 /spl mu/m BiCMOS process is supplied at 1.8 V and consumes less than 24mA when receiving and less than 18mA when transmitting. The receiver has -91dBm sensitivity and best-in-class blocker performance. Architecture, circuits and radio performance are reviewed. A Bluetooth headset based on this transceiver consumes 12mA in a 64kb/s HV3 voice link, has 10h talk time and weighs only 14g.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116082900","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An FPGA based accelerator for SAT based combinational equivalence checking 基于FPGA的SAT组合等效检验加速器
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.40
M. Safar, M. El-Kharashi, A. Salem
{"title":"An FPGA based accelerator for SAT based combinational equivalence checking","authors":"M. Safar, M. El-Kharashi, A. Salem","doi":"10.1109/IWSOC.2005.40","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.40","url":null,"abstract":"In this paper we present software/reconfigurable hardware SAT accelerator for combinational equivalence checking. The SAT binary clauses are mapped into an implication graph and the ternary clauses are kept in an indexed clause database and mapped into the clause evaluator and conflict detector implemented on FPGA. The validity of the proposed approach is shown through the ISCAS'85 benchmark circuits.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115366289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
System-on-chip design beyond 50 GHz 超过50 GHz的片上系统设计
Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI: 10.1109/IWSOC.2005.103
S. Voinigescu, M. Gordon, Chihou Lee, T. Yao, A. Mangan, K. Yau
{"title":"System-on-chip design beyond 50 GHz","authors":"S. Voinigescu, M. Gordon, Chihou Lee, T. Yao, A. Mangan, K. Yau","doi":"10.1109/IWSOC.2005.103","DOIUrl":"https://doi.org/10.1109/IWSOC.2005.103","url":null,"abstract":"Candidate topologies and design methodologies for millimeter-wave IC building blocks such as LNAs, mixers, VCOs, and power amplifiers are discussed and recent experimental results obtained in SiGe BiCMOS and 90-nm RF CMOS technologies using inductors and transformers above 50 GHz are presented.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127178997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信