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2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)最新文献

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Thermal Fatigue Analysis of Microbumps in a 3D TSV Integration Device 三维TSV集成装置微凸点热疲劳分析
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9962974
Yuqing Lu, Jun Wang
{"title":"Thermal Fatigue Analysis of Microbumps in a 3D TSV Integration Device","authors":"Yuqing Lu, Jun Wang","doi":"10.1109/ICTA56932.2022.9962974","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9962974","url":null,"abstract":"Copper microbumps are generally used in three-dimensional (3D) through silicon vias (TSV) integration devices. Because the structure of 3D TSV integration is complex, the thermal fatigue of microbumps may take place due to higher stresses during thermal cycles. In this study, a typical 3D TSV integration was analyzed by finite element method to evaluate the thermal fatigue life of microbumps in different locations based on Coffin-Manson model. To keep the accuracy of analysis, the elastoplastic and Anand constitutive relationships were adopted for the copper microbumps and the micro solder balls, respectively. The results revealed that the critical microbump with lower fatigue life is under the memory module, and the microbumps under the peripheral chips have much better fatigue performance.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"188 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124164546","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications 面向实时应用的高效AVS3内部预测硬件设计
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963036
Yucheng Jiang, Hai-Jun Guo, Junhao Zheng, Jingsheng Wang, Songping Mai
{"title":"Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications","authors":"Yucheng Jiang, Hai-Jun Guo, Junhao Zheng, Jingsheng Wang, Songping Mai","doi":"10.1109/ICTA56932.2022.9963036","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963036","url":null,"abstract":"a hardware-efficient hybrid greedy CU (coding unit) partition algorithm for AVS3 intra prediction, which has advantages over the traditional regression algorithm on both scheduling complexity and resource consumption, is presented. Compared with the NVidia hardware acceleration of HEVC, the proposed algorithm achieves 21% performance improvement on AI (all-intra) configuration for UHD 4K video encoding.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128033688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 41-GHz 19.4-dBm PSATCMOS Doherty Power Amplifier for 5G NR Applications 用于5G NR应用的41 ghz 19.4 dbm PSATCMOS多尔蒂功率放大器
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9962970
Zheng Li, Zixin Chen, Qiaoyu Wang, Junqing Liu, Jian Pang, A. Shirane, K. Okada
{"title":"A 41-GHz 19.4-dBm PSATCMOS Doherty Power Amplifier for 5G NR Applications","authors":"Zheng Li, Zixin Chen, Qiaoyu Wang, Junqing Liu, Jian Pang, A. Shirane, K. Okada","doi":"10.1109/ICTA56932.2022.9962970","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9962970","url":null,"abstract":"In this paper, a 41-GHz Doherty power amplifier (PA) in a standard 65nm CMOS technology is presented for 5G New Radio (NR) applications. The PA implements transformer-based parallel-combined Doherty structure to enhance the power-added efficiency (PAE). And the tunable 90° hybrid is proposed for out-put phase compensation. This work achieves a saturated output power (PSAT) of 19.4dBm and an OP1dB of 18.6dBm at 41.5GHz under 1-V power supply. The peak PAE and the PAE at 6-dB out-put power back-off (PBO) are 30.4% and 19.2%, respectively. The core chip area is 0.22 mm2with a static power consumption of 76mW.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131304377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Efficient FPGA Design for Fixed-point Exponential Calculation 一种高效的定点指数计算FPGA设计
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963050
Weiyi Zhang, Chun Zhang, L. Niu, Fasih Ud Din, Farrukh, Hanjun Jiang
{"title":"An Efficient FPGA Design for Fixed-point Exponential Calculation","authors":"Weiyi Zhang, Chun Zhang, L. Niu, Fasih Ud Din, Farrukh, Hanjun Jiang","doi":"10.1109/ICTA56932.2022.9963050","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963050","url":null,"abstract":"Exponential calculation is widely used in different algorithms, such as the activation functions of artificial neural networks. However, it is hard to implement on FPGA, consuming much time and resources. In this work, a novel exponential calculation module for fixed-point number is proposed based on the theory of Fast InvSqrt. The proposed exponential unit achieves at most 3.7x throughput while the resource utilization is largely reduced compared with previous works. The efficiency and accuracy are suitable for different applications.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"242 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131868286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Photoresponses and Memory Effects in Optoelectronic Synaptic Devices Based on CdSe Quantum Dots and Poly(3-hexylthiophene) 基于CdSe量子点和聚(3-己基噻吩)的光电突触器件的光响应和记忆效应
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9962982
Zhicheng Li, Zhulu Song, Zhaojin Wang, Jiayun Sun, Kai Wang
{"title":"Photoresponses and Memory Effects in Optoelectronic Synaptic Devices Based on CdSe Quantum Dots and Poly(3-hexylthiophene)","authors":"Zhicheng Li, Zhulu Song, Zhaojin Wang, Jiayun Sun, Kai Wang","doi":"10.1109/ICTA56932.2022.9962982","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9962982","url":null,"abstract":"The optical responses and memory effects of photoelectric synaptic devices based on CdSe quantum dots (QDs) and poly(3-hexylthiophene) (P3HT) are studied in this work. Compared with devices only incorporating CdSe QDs, the devices based on CdSe QDs and P3HT exhibit higher photocurrents because the heterojunction formed by CdSe QDs and P3HT enhances the separation of photogenerated excitons, and the loss of excitons in the QDs reduces. In addition, due to the effect of the surface defect trapping charge of CdSe QDs, the photocurrent of the device can still be maintained for more than 100 seconds under the condition of zero gate voltage. Finally, the device can perform each synaptic activity with a low power consumption of 12.9 pJ by adjusting the concentration of QDs.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132091264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
All-Digital Full-Precision In-SRAM Computing with Reduction Tree for Energy-Efficient MAC Operations 节能MAC操作的全数字全精度sram计算与约简树
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963042
Dengfeng Wanq, Zhi Li, C. Chang, Weifeng He, Yanan Sun
{"title":"All-Digital Full-Precision In-SRAM Computing with Reduction Tree for Energy-Efficient MAC Operations","authors":"Dengfeng Wanq, Zhi Li, C. Chang, Weifeng He, Yanan Sun","doi":"10.1109/ICTA56932.2022.9963042","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963042","url":null,"abstract":"This paper proposes an all-digital full-precision static random-access memory based computing-in-memory (SRAM-CIM) macro with compressor-based reduction tree (CRT) for energy-efficient multiplication-and-accumulation (MAC) operations. The proposed CRT composed of hybrid 28T/18T/14T 3–2 compressors (full adders, FAs) and 18T half adders (HAs) with lower supply voltage consumes lower power compared to conventional binary adder tree (BAT). The experimental results show that the power and area of the proposed CRT are reduced by up to 56.15% and 28.11%, respectively, as compared to BAT. The proposed SRAM-CIM macro with CRT achieves 78.07% higher energy efficiency per unit area, compared to previous all-digital full-precision SRAM-CIM macro with BAT.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133513261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 92.7% Peak Efficiency 48/1V DSD Power Converter with 102mV Droop and 1.6µs Settling Time for a 1A/10ns Load Transient 一个峰值效率为92.7%的48/1V DSD功率转换器，电压降为102mV，稳定时间为1.6µs，适用于1A/10ns负载瞬态
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963045
Yongchao Zhang, Zhuoqi Guo, Zhongming Xue, Zhuoneng Li, Xihao Liu, Shangzhou Zhao, Dexuan Lv, Mengqi Duan, Li Geng
{"title":"A 92.7% Peak Efficiency 48/1V DSD Power Converter with 102mV Droop and 1.6µs Settling Time for a 1A/10ns Load Transient","authors":"Yongchao Zhang, Zhuoqi Guo, Zhongming Xue, Zhuoneng Li, Xihao Liu, Shangzhou Zhao, Dexuan Lv, Mengqi Duan, Li Geng","doi":"10.1109/ICTA56932.2022.9963045","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963045","url":null,"abstract":"With the rapid growth of data centers, the power supply has shifted from 48/12/1V two-stage architecture to 48/1V single-stage. In this paper, a new two-phase sawtooth voltage mode PWM control is proposed for the double step-down (DSD) converter. In order to solve the problem of inherent cycle delay of PWM control, a fast-transient response scheme is proposed. The converter also has a precharge and soft start scheme, which is designed with a 0.18 µm BCD process. It achieves peak efficiencies of 92.7%, 90%, 87.8%, and 86% at 250 kHz, 500 kHz, 750 kHz, and 1 MHz, respectively. During a 1A/10 ns load jump, the undershoot is reduced from 200 mV to 102 mV and the setting time is reduced from 5.3 µs to 1.6 µs.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133852085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SAUST: A Scheme for Acceleration of Unstructured Sparse Transformer 非结构化稀疏变压器的一种加速方案
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963119
Yifan Song, Shunpeng Zhao, Song Chen, Yi Kang
{"title":"SAUST: A Scheme for Acceleration of Unstructured Sparse Transformer","authors":"Yifan Song, Shunpeng Zhao, Song Chen, Yi Kang","doi":"10.1109/ICTA56932.2022.9963119","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963119","url":null,"abstract":"Transformer achieves impressive results on many AI tasks. However, it also introduces a huge amount of computation. Pruning is a promising method to reduce the computation load by generating sparse transformer models. To avoid load imbalance caused by computing involved in zero elements, previous works explore structured pruning combined with hardware acceleration. However, tight constraints in structured pruning usually make training much harder and reach a lower sparsity level in the end. This paper proposes SAUST, a scheme that exploits the high sparsity level of unstructured pruning and addresses the load imbalance problem using both hardware and software methods. FPGA implementation shows that SAUST can achieve 3.35x and 2.76x execution time speedup compared to two state-of-the-art references on hardware accelerators.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123120789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low Supply Sensitivity CMOS Temperature Sensor Using Dynamic-Distributing-Bias Circuit 采用动态分布偏置电路的低电源灵敏度CMOS温度传感器
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963102
Shichong Zhai, Wenchang Li, Jian Liu, Tianyi Zhang
{"title":"A Low Supply Sensitivity CMOS Temperature Sensor Using Dynamic-Distributing-Bias Circuit","authors":"Shichong Zhai, Wenchang Li, Jian Liu, Tianyi Zhang","doi":"10.1109/ICTA56932.2022.9963102","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963102","url":null,"abstract":"This work presents a low supply sensitivity CMOS temperature sensor using dynamic-distributing-bias circuits. A new hybrid PTAT/REF current generator is proposed to reduce the power consumption. Some techniques such as chopping, dynamic element matching (DEM) and ratiometric curvature correction are adopted to improve the temperature sensing accuracy. The sensor is designed and simulated in 0.153-μm CMOS process and occupies 0.07 mm2 area. In the temperature range of -55°C to 125 °C, the simulated temperature sensing accuracy is ±0.4°C after one-point calibration.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123765685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Q-Band Low-Noise Amplifier in 40-nm CMOS for Q/V-band satellite communications 用于Q/ v波段卫星通信的40nm CMOS Q波段低噪声放大器
2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI: 10.1109/ICTA56932.2022.9963129
Qin Tian, Dixian Zhao
{"title":"A Q-Band Low-Noise Amplifier in 40-nm CMOS for Q/V-band satellite communications","authors":"Qin Tian, Dixian Zhao","doi":"10.1109/ICTA56932.2022.9963129","DOIUrl":"https://doi.org/10.1109/ICTA56932.2022.9963129","url":null,"abstract":"This paper proposes a Q-band single-ended LNA fabricated in 40-nm CMOS technology, where two-stage cascode topology and inductive source degeneration technique are employed. The proposed LNA has achieved a lowest NF of 4.3 dB, and a maximum power gain of 24.2 dB with a 3-dB bandwidth of 11 GHz, consuming 17.85 mW dc power from a 1.5 V supply.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134395576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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