All-Digital Full-Precision In-SRAM Computing with Reduction Tree for Energy-Efficient MAC Operations

Abstract

This paper proposes an all-digital full-precision static random-access memory based computing-in-memory (SRAM-CIM) macro with compressor-based reduction tree (CRT) for energy-efficient multiplication-and-accumulation (MAC) operations. The proposed CRT composed of hybrid 28T/18T/14T 3–2 compressors (full adders, FAs) and 18T half adders (HAs) with lower supply voltage consumes lower power compared to conventional binary adder tree (BAT). The experimental results show that the power and area of the proposed CRT are reduced by up to 56.15% and 28.11%, respectively, as compared to BAT. The proposed SRAM-CIM macro with CRT achieves 78.07% higher energy efficiency per unit area, compared to previous all-digital full-precision SRAM-CIM macro with BAT.