A 92.7% Peak Efficiency 48/1V DSD Power Converter with 102mV Droop and 1.6µs Settling Time for a 1A/10ns Load Transient

Yongchao Zhang, Zhuoqi Guo, Zhongming Xue, Zhuoneng Li, Xihao Liu, Shangzhou Zhao, Dexuan Lv, Mengqi Duan, Li Geng
{"title":"A 92.7% Peak Efficiency 48/1V DSD Power Converter with 102mV Droop and 1.6µs Settling Time for a 1A/10ns Load Transient","authors":"Yongchao Zhang, Zhuoqi Guo, Zhongming Xue, Zhuoneng Li, Xihao Liu, Shangzhou Zhao, Dexuan Lv, Mengqi Duan, Li Geng","doi":"10.1109/ICTA56932.2022.9963045","DOIUrl":null,"url":null,"abstract":"With the rapid growth of data centers, the power supply has shifted from 48/12/1V two-stage architecture to 48/1V single-stage. In this paper, a new two-phase sawtooth voltage mode PWM control is proposed for the double step-down (DSD) converter. In order to solve the problem of inherent cycle delay of PWM control, a fast-transient response scheme is proposed. The converter also has a precharge and soft start scheme, which is designed with a 0.18 µm BCD process. It achieves peak efficiencies of 92.7%, 90%, 87.8%, and 86% at 250 kHz, 500 kHz, 750 kHz, and 1 MHz, respectively. During a 1A/10 ns load jump, the undershoot is reduced from 200 mV to 102 mV and the setting time is reduced from 5.3 µs to 1.6 µs.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTA56932.2022.9963045","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

With the rapid growth of data centers, the power supply has shifted from 48/12/1V two-stage architecture to 48/1V single-stage. In this paper, a new two-phase sawtooth voltage mode PWM control is proposed for the double step-down (DSD) converter. In order to solve the problem of inherent cycle delay of PWM control, a fast-transient response scheme is proposed. The converter also has a precharge and soft start scheme, which is designed with a 0.18 µm BCD process. It achieves peak efficiencies of 92.7%, 90%, 87.8%, and 86% at 250 kHz, 500 kHz, 750 kHz, and 1 MHz, respectively. During a 1A/10 ns load jump, the undershoot is reduced from 200 mV to 102 mV and the setting time is reduced from 5.3 µs to 1.6 µs.
一个峰值效率为92.7%的48/1V DSD功率转换器,电压降为102mV,稳定时间为1.6µs,适用于1A/10ns负载瞬态
随着数据中心的快速增长,电源从48/12/1V两级架构转向了48/1V单级架构。本文提出了一种用于双降压(DSD)变换器的两相锯齿电压型PWM控制方法。为了解决PWM控制固有的周期延迟问题,提出了一种快速暂态响应方案。该转换器还具有预充和软启动方案,该方案采用0.18µm BCD工艺设计。它在250 kHz、500 kHz、750 kHz和1 MHz分别达到92.7%、90%、87.8%和86%的峰值效率。在1A/10 ns负载跳变期间,欠冲从200 mV降低到102 mV,整定时间从5.3µs降低到1.6µs。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信