2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)最新文献_第5页

Automatic design rule correction in presence of multiple grids and track patterns 在存在多个网格和轨迹模式时自动校正设计规则

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488766

Nitin Salodkar, Subramanian Rajagopalan, S. Bhattacharya, S. Batterywala

引用次数: 1

Compiler-based side channel vulnerability analysis and optimized countermeasures application 基于编译器的侧信道漏洞分析及优化对策应用

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488833

G. Agosta, Alessandro Barenghi, Massimo Maggi, Gerardo Pelosi

引用次数: 39

An accurate semi-analytical framework for full-chip TSV-induced stress modeling 全芯片tsv诱导应力建模的精确半解析框架

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488957

Yang Li, D. Pan

引用次数: 2

Minimum-energy state guided physical design for Nanomagnet Logic 纳米磁体逻辑的最小能量状态引导物理设计

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488865

Shiliang Liu, G. Csaba, X. Hu, E. Varga, M. Niemier, G. Bernstein, W. Porod

引用次数: 5

Efficient moment estimation with extremely small sample size via bayesian inference for analog/mixed-signal validation 有效的矩估计与极小的样本量通过贝叶斯推理模拟/混合信号验证

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488813

Chenjie Gu, E. Chiprout, Xin Li

{"title":"Efficient moment estimation with extremely small sample size via bayesian inference for analog/mixed-signal validation","authors":"Chenjie Gu, E. Chiprout, Xin Li","doi":"10.1145/2463209.2488813","DOIUrl":"https://doi.org/10.1145/2463209.2488813","url":null,"abstract":"A critical problem in pre-Silicon and post-Silicon validation of analog/mixed-signal circuits is to estimate the distribution of circuit performances, from which the probability of failure and parametric yield can be estimated at all circuit configurations and corners. With extremely small sample size, traditional estimators are only capable of achieving a very low confidence level, leading to either over-validation or under-validation. In this paper, we propose a multi-population moment estimation method that significantly improves estimation accuracy under small sample size. In fact, the proposed estimator is theoretically guaranteed to outperform usual moment estimators. The key idea is to exploit the fact that simulation and measurement data collected under different circuit configurations and corners can be correlated, and are conditionally independent. We exploit such correlation among different populations by employing a Bayesian framework, i.e., by learning a prior distribution and applying maximum a posteriori estimation using the prior. We apply the proposed method to several datasets including post-silicon measurements of a commercial highspeed I/O link, and demonstrate an average error reduction of up to 2×, which can be equivalently translated to significant reduction of validation time and cost.","PeriodicalId":320207,"journal":{"name":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130119245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

VAWOM: Temperature and process variation aware WearOut Management in 3D multicore architecture 三维多核架构中温度和工艺变化感知的损耗管理

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488953

H. Tajik, H. Homayoun, N. Dutt

引用次数: 16

The ITRS design technology and system drivers roadmap: Process and status ITRS设计技术和系统驱动路线图:过程和状态

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488776

A. Kahng

引用次数: 46

Dynamic voltage and frequency scaling for shared resources in multicore processor designs 多核处理器设计中共享资源的动态电压和频率缩放

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488874

X. Chen, Zheng Xu, Hyungjun Kim, Paul V. Gratz, Jiang Hu, M. Kishinevsky, Ümit Y. Ogras, R. Ayoub

引用次数: 64

Smart hill climbing for agile dynamic mapping in many-core systems 多核心系统中敏捷动态映射的智能爬坡

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488782

Mohammad Fattah, M. Daneshtalab, P. Liljeberg, J. Plosila

{"title":"Smart hill climbing for agile dynamic mapping in many-core systems","authors":"Mohammad Fattah, M. Daneshtalab, P. Liljeberg, J. Plosila","doi":"10.1145/2463209.2488782","DOIUrl":"https://doi.org/10.1145/2463209.2488782","url":null,"abstract":"Stochastic hill climbing algorithm is adapted to rapidly find the appropriate start node in the application mapping of network-based many-core systems. Due to highly dynamic and unpredictable workload of such systems, an agile run-time task allocation scheme is required. The scheme is desired to map the tasks of an incoming application at run-time onto an optimum contiguous area of the available nodes. Contiguous and unfragmented area mapping is to settle the communicating tasks in close proximity. Hence, the power dissipation, the congestion between different applications, and the latency of the system will be significantly reduced. To find an optimum region, we first propose an approximate model that quickly estimates the available area around a given node. Then the stochastic hill climbing algorithm is used as a search heuristic to find a node that has the required number of available nodes around it. Presented agile climber takes the steps using an adapted version of hill climbing algorithm named Smart Hill Climbing, SHiC, which takes the runtime status of the system into account. Finally, the application mapping is performed starting from the selected first node. Experiments show significant gain in the mapping contiguousness which results in better network latency and power dissipation, compared to state-of-the-art works.","PeriodicalId":320207,"journal":{"name":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121031773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 107

Distributed stable states for process networks - Algorithm, analysis, and experiments on intel SCC 过程网络的分布式稳定状态。在英特尔SCC上的算法、分析和实验

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC) Pub Date : 2013-05-29 DOI: 10.1145/2463209.2488941

Devendra Rai, Lars Schor, N. Stoimenov, L. Thiele

{"title":"Distributed stable states for process networks - Algorithm, analysis, and experiments on intel SCC","authors":"Devendra Rai, Lars Schor, N. Stoimenov, L. Thiele","doi":"10.1145/2463209.2488941","DOIUrl":"https://doi.org/10.1145/2463209.2488941","url":null,"abstract":"Technology scaling is a common trend in current embedded systems. It has promoted the use of multi-core, multiprocessor, and distributed platforms. Such systems usually require run-time migration of distributed applications between the different nodes of the platform in order to balance the workload or to tolerate faults. Before an application can be migrated, it needs to be brought to a stable state such that restarting the application after migration does not violate its functional correctness. An application in a stable state does not change its context any further, and therefore, stabilization is a prerequisite for any application migration. Process networks are a common model of computation for specifying distributed applications. However, most results on the migration of process networks do not provide an algorithm to put a general process network into a stable state, suitable for migration. This paper proposes a technique which efficiently and correctly brings a process network executing on a distributed system to a known stable state. The correctness of the technique is independent of the temporal characteristics of the system and the topology of the process network. The required modifications of a process network are lightweight and preserve its original functionality. A model characterizing the timing properties of the technique is provided. The feasibility and efficiency of the proposed approach and the respective model are validated with experimental results on Intel's SCC platform.","PeriodicalId":320207,"journal":{"name":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","volume":"175 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116533548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3