4th IEEE International Workshop on System-on-Chip for Real-Time Applications最新文献_第4页

Development of timing driven IP design flow based on physical knowledge synthesis 基于物理知识综合的定时驱动IP设计流程开发

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319877

A. K. Kumaraswamy, A. Erdogan, I. Atluri

{"title":"Development of timing driven IP design flow based on physical knowledge synthesis","authors":"A. K. Kumaraswamy, A. Erdogan, I. Atluri","doi":"10.1109/IWSOC.2004.1319877","DOIUrl":"https://doi.org/10.1109/IWSOC.2004.1319877","url":null,"abstract":"Over the last three years, many of the big vendors in electronic design automation have focused their R&D efforts on all-in-one RTL-to-GDSII tool suites that tie together logical or register-transfer-level design and synthesis with floor planning, placement and routing. The idea is that linking these tools tightly in a single flow better equip engineers to deal with the timing, power and signal-integrity issues of deep-submicron fabrication processes by letting them write RTL and perform synthesis, placement and routing in a single pass. The result is to get designs out of the door more quickly. Recent CAD methodologies such as SP&R from Cadence have made an attempt to address issues of timing closures and design reliability both of which are gaining significance as device geometries continues to shrink further into the deep submicron realm. Addressing these issues requires new levels of integration between logic design and physical implementation technologies. This paper proposes a timing driven IP design flow based on PKS technology. The study progressed with the development of script files for efficient timing. The preliminary results indicate 5% efficiency in the timing.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129592761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A fully automated approach for analog circuit reuse 模拟电路复用的全自动方法

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319886

S. Hammouda, M. Dessouky, M. Tawfik, Wael Badawy

引用次数: 4

Bit memory instructions for a general CPU 一般CPU的位内存指令

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319881

M. Olausson, A. Edman, Dake Liu

引用次数: 1

An optimal charge balancing model for fast distributed SystemC simulation in IP/SoC design IP/SoC设计中快速分布式SystemC仿真的最佳电荷平衡模型

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319849

S. Meftali, J. Dekeyser

引用次数: 3

RtrASSoc - adaptable superscalar reconfigurable programmable system on chip - the embedded operating system - EOS 片上自适应超标量可重构可编程系统-嵌入式操作系统- EOS

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.57

J.L. Silva, K.A.P. Costa

引用次数: 2

Data-flow timing models of dynamic multimedia applications for multiprocessor systems 多处理器系统动态多媒体应用的数据流定时模型

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319879

M. Pastrnak, P. Poplavko, P. D. With, D. Farin

引用次数: 16

A framework for implementing reusable digital signal processing modules 实现可重用数字信号处理模块的框架

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319848

L.-P. Lafrance, Y. Savaria

引用次数: 1

Empirical analysis of operand usage and transport in multimedia applications 多媒体应用中操作数使用和传输的实证分析

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319872

Hongkyu Kim, D. S. Wills, L. Wills

引用次数: 5

Consistency validation of high-level requirements 高级需求的一致性验证

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.29

N. Gorse, E. Aboulhamid, Y. Savaria

引用次数: 4

RNS application for digital image processing RNS应用于数字图像处理

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.1319854

Wei Wang, M. Swamy, M. O. Ahmad

引用次数: 83