{"title":"A fully automated approach for analog circuit reuse","authors":"S. Hammouda, M. Dessouky, M. Tawfik, Wael Badawy","doi":"10.1109/IWSOC.2004.1319886","DOIUrl":null,"url":null,"abstract":"Demonstrated in this paper is a technique for automatic circuit resizing between different technologies. This technology is not based on any optimization techniques, but rather relies on a new algorithm based on knowledge extraction, which makes it a very fast technique. This technique studies the original design and extracts its major features (basic devices & blocks features, device matching, parasitics, and symmetry) and then reproduces a new sized design in the target technology with the same performance as the original design. The migration of a low voltage delta sigma A/D is presented in this paper to validate the migration engine.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2004.1319886","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Demonstrated in this paper is a technique for automatic circuit resizing between different technologies. This technology is not based on any optimization techniques, but rather relies on a new algorithm based on knowledge extraction, which makes it a very fast technique. This technique studies the original design and extracts its major features (basic devices & blocks features, device matching, parasitics, and symmetry) and then reproduces a new sized design in the target technology with the same performance as the original design. The migration of a low voltage delta sigma A/D is presented in this paper to validate the migration engine.
本文演示了一种在不同技术之间自动调整电路尺寸的技术。该技术不是基于任何优化技术,而是依赖于一种基于知识提取的新算法,这使得它是一种非常快速的技术。该技术对原设计进行研究,提取其主要特征(基本器件和块特征、器件匹配、寄生性、对称性),在目标技术中再现出与原设计性能相同的新尺寸设计。本文提出了一个低电压δ σ a /D的偏移,以验证偏移引擎。