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4th IEEE International Workshop on System-on-Chip for Real-Time Applications最新文献

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Reconfigurable 2.5 GHz phase-locked loop for system on chip applications 可重构的2.5 GHz锁相环系统芯片上的应用
4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI: 10.1109/IWSOC.2004.55
K. Iniewski, M. Syrzycki, S. Magierowski
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引用次数: 2
An embedded tester core for system-on-chip architectures 用于片上系统架构的嵌入式测试核心
4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-01 DOI: 10.1109/IWSOC.2004.22
R. Rashidzadeh, M. Ahmadi, W. C. Miller
{"title":"An embedded tester core for system-on-chip architectures","authors":"R. Rashidzadeh, M. Ahmadi, W. C. Miller","doi":"10.1109/IWSOC.2004.22","DOIUrl":"https://doi.org/10.1109/IWSOC.2004.22","url":null,"abstract":"Automatic test equipment (ATE) capabilities have been realized using a novel embedded tester core (ETC) core designed to test large system-on-chip (SoC) implementations. The proposed ETC core appears as an additional IP core that is embedded in the system-on-chip. It can perform the advanced timing and control testing requirements that are necessary to apply the deterministic test patterns that are generated by core vendors and SoC designers. At-speed test patterns are applied to the core under test (CUT) to detect static and dynamic faults that are difficult and expensive to cover with a conventional external ATE. The ETC core is designed for at-speed testing with minimum area overhead and low power consumption in 0.18 /spl mu/m CMOS technology.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129945329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Interfacing in microprocessor-based systems with an advanced physical addressing 在基于微处理器的系统中使用高级物理寻址的接口
4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2003-07-22 DOI: 10.1109/IWSOC.2004.1319887
M. Maamoun, B. Laichi, A. Benbelkacem, D. Berkani
{"title":"Interfacing in microprocessor-based systems with an advanced physical addressing","authors":"M. Maamoun, B. Laichi, A. Benbelkacem, D. Berkani","doi":"10.1109/IWSOC.2004.1319887","DOIUrl":"https://doi.org/10.1109/IWSOC.2004.1319887","url":null,"abstract":"An architecture for interfacing the data exchange between microprocessor-based systems and external devices is presented. This architecture investigates the great capacity of the interfacing of extended physical addressing and uses both the direct memory access (DMA) technique and memory integration. This method will contribute to improve the speed of data exchange.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129295608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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