{"title":"片上自适应超标量可重构可编程系统-嵌入式操作系统- EOS","authors":"J.L. Silva, K.A.P. Costa","doi":"10.1109/IWSOC.2004.57","DOIUrl":null,"url":null,"abstract":"This paper describes the development of the (embedded operating system), part of RtrASSoc - an adaptable, superscalar, reconfigurable system in a programmable chip (PSOC), to be implemented in a FPGA Virtex from Xilinx. RtrASSoc will be used in embedded applications that need larger capacity, better acting, and dynamic reconfiguration, at a low cost, where the application is who defines the whole structure of the platform RtrASSoc. The resource of dynamic reconfiguration to be used will be the model run-time reconfiguration-Rtr, present in FPGAs Virtex from Xilinx. The function of the embedded operating system will be to manager the units: PSE (embedded superscalar processor), and RR (reconfigurable routines), all belonging to RtrASSoc. RtrASSoc will be used in the recognition of patterns and it will be developed in language VHDL.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"428 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"RtrASSoc - adaptable superscalar reconfigurable programmable system on chip - the embedded operating system - EOS\",\"authors\":\"J.L. Silva, K.A.P. Costa\",\"doi\":\"10.1109/IWSOC.2004.57\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the development of the (embedded operating system), part of RtrASSoc - an adaptable, superscalar, reconfigurable system in a programmable chip (PSOC), to be implemented in a FPGA Virtex from Xilinx. RtrASSoc will be used in embedded applications that need larger capacity, better acting, and dynamic reconfiguration, at a low cost, where the application is who defines the whole structure of the platform RtrASSoc. The resource of dynamic reconfiguration to be used will be the model run-time reconfiguration-Rtr, present in FPGAs Virtex from Xilinx. The function of the embedded operating system will be to manager the units: PSE (embedded superscalar processor), and RR (reconfigurable routines), all belonging to RtrASSoc. RtrASSoc will be used in the recognition of patterns and it will be developed in language VHDL.\",\"PeriodicalId\":306688,\"journal\":{\"name\":\"4th IEEE International Workshop on System-on-Chip for Real-Time Applications\",\"volume\":\"428 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-07-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"4th IEEE International Workshop on System-on-Chip for Real-Time Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2004.57\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2004.57","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RtrASSoc - adaptable superscalar reconfigurable programmable system on chip - the embedded operating system - EOS
This paper describes the development of the (embedded operating system), part of RtrASSoc - an adaptable, superscalar, reconfigurable system in a programmable chip (PSOC), to be implemented in a FPGA Virtex from Xilinx. RtrASSoc will be used in embedded applications that need larger capacity, better acting, and dynamic reconfiguration, at a low cost, where the application is who defines the whole structure of the platform RtrASSoc. The resource of dynamic reconfiguration to be used will be the model run-time reconfiguration-Rtr, present in FPGAs Virtex from Xilinx. The function of the embedded operating system will be to manager the units: PSE (embedded superscalar processor), and RR (reconfigurable routines), all belonging to RtrASSoc. RtrASSoc will be used in the recognition of patterns and it will be developed in language VHDL.