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Proceedings of the 30th European Solid-State Circuits Conference最新文献

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A G/sub m/-C baseband filter with automatic frequency tuning for a direct conversion IEEE802.11a wireless LAN receiver 一个G/sub / c基带滤波器，具有自动频率调谐，用于直接转换IEEE802.11a无线局域网接收器
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356628
B. Shi, W. Shan
{"title":"A G/sub m/-C baseband filter with automatic frequency tuning for a direct conversion IEEE802.11a wireless LAN receiver","authors":"B. Shi, W. Shan","doi":"10.1109/ESSCIR.2004.1356628","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356628","url":null,"abstract":"A 5/sup th/ order GM-C baseband filter, with on-chip automatic frequency tuning, implemented in a 0.25 /spl mu/m BiCMOS process, is presented. Targeted for the channel selecting section of a direct-conversion IEEE 802.11a wireless LAN (WLAN) receiver, this filter has a 9.2 MHz passband with less than 0.3 dB passband ripple. The stop band attenuation is some 40 dB and 70 dB at 20 MHz and 40 MHz, respectively. By using highly linear low noise G/sub m/-C integrators, the filter achieves 79 /spl mu/V/sub rms/ total passband noise, 5.6 dBV passband input IP3, and 73 dB dynamic range for 1% THD with a 1 MHz input signal, while consuming less than 15 mW DC power from a 3 V supply.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125261689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Charge recycling sense amplifier based logic: securing low power security ICs against DPA [differential power analysis] 基于电荷回收感测放大器的逻辑:保护低功耗安全ic对抗DPA[差分功率分析]
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356647
K. Tiri, I. Verbauwhede
{"title":"Charge recycling sense amplifier based logic: securing low power security ICs against DPA [differential power analysis]","authors":"K. Tiri, I. Verbauwhede","doi":"10.1109/ESSCIR.2004.1356647","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356647","url":null,"abstract":"A charge recycling sense amplifier based logic is presented.. This logic is derived from the sense amplifier based logic, which is a logic style with signal independent power consumption. It has been proven previously to protect security devices such as smart cards against power attacks. Experimental results show that the use of advanced circuit techniques, which enable charge recycling and intermediate precharge voltages, saves 20% in power consumption and 63% in peak supply current and that the logic style preserves the energy masking behavior of the sense amplifier based logic.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114297350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 62
A dual-mode low-pass filter for 802.11b/Bluetooth receiver 用于802.11b/蓝牙接收器的双模低通滤波器
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356708
A. Mohieldin, E. Sánchez-Sinencio
{"title":"A dual-mode low-pass filter for 802.11b/Bluetooth receiver","authors":"A. Mohieldin, E. Sánchez-Sinencio","doi":"10.1109/ESSCIR.2004.1356708","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356708","url":null,"abstract":"The design of a dual-mode low-pass channel selection filter for a dual-standard 802.11b/Bluetooth direct conversion receiver is presented. The filter is an OTA-C, 5/sup th/ order, Butterworth low pass structure. The OTA is implemented as a source-degenerated bipolar differential pair. Dual-mode operation, 600 kHz cut-off frequency for Bluetooth mode and 6 MHz for Wi-Fi mode, is achieved by switching the source-degeneration resistors and the capacitors. The filter operates from a single 2.5 V supply while consuming 2.7 mA and 0.9 mA for 802.11b and Bluetooth, respectively. It achieves 10 dBm in-band IIP3, 40 dBm out-of-band IIIP3 for both modes. The measured input referred noise density is -148.92 dBV/Hz and -140.48 dBV/Hz for 802.11b and Bluetooth, respectively.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121915314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Notice of Violation of IEEE Publication PrinciplesA 10GHz SiGe OC192 frequency synthesizer using a passive feed-forward loop filter and a half rate oscillator 一种10GHz SiGe OC192频率合成器，采用无源前馈环路滤波器和半速率振荡器
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356693
A. Maxim
{"title":"Notice of Violation of IEEE Publication PrinciplesA 10GHz SiGe OC192 frequency synthesizer using a passive feed-forward loop filter and a half rate oscillator","authors":"A. Maxim","doi":"10.1109/ESSCIR.2004.1356693","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356693","url":null,"abstract":"A 10 GHz OC192 PLL frequency synthesizer was realized in a 0.25 μm SiGe BiCMOS process with 60 GHz transition frequency. Its phase noise was significantly reduced by using a half rate oscillator followed by a frequency doubler that alleviates the low quality factor of junction varactors at 10 GHz. A fully integrated loop filter was implemented using a passive feed-forward configuration, in conjunction with a Miller capacitance multiplier. A process and divider modulus independent PLL architecture keeps constant the phase margin, settling time and loop sampling ratio over design corners. The IC specifications include: 9.953/10.3125 GHz serial data rates, 155/622 MHz reference frequency, 5 mUI/sub rms/ serial clock random jitter, <8ps/sub p-p/ serial data deterministic jitter, 120 dBc oscillator phase noise at 100 kHz offset, 3-3.6 supply voltage, 1 W power dissipation and 2×2 mm/sup 2/ die area.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126704806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Temperature stabilised tunable Gm-C filter for very low frequencies 温度稳定可调谐的Gm-C滤波器非常低的频率
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356629
P. Bruschi, G. Barillaro, F. Pieri, M. Piotto
{"title":"Temperature stabilised tunable Gm-C filter for very low frequencies","authors":"P. Bruschi, G. Barillaro, F. Pieri, M. Piotto","doi":"10.1109/ESSCIR.2004.1356629","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356629","url":null,"abstract":"In this work, a continuous time low pass filter, with sub-Hz upper band limit, is presented. The circuit is based on a Gm-C approach, where the transconductance is stabilised against temperature variations over a wide temperature range (0-80/spl deg/C) using a DC feedback loop applied to a dummy transconductor (master). The very low transconductance values required to obtain low frequency singularities are achieved by means of multistage current division. A first order low pass prototype filter has been fabricated by means of the 1-/spl mu/m BCD3S process of STMicroelectronics.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124213795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Thermally optimized demagnetization of inductive loads [power IC load switching] 感应负载的热优化退磁[功率IC负载切换]
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356663
W. Horn, P. Singerl
{"title":"Thermally optimized demagnetization of inductive loads [power IC load switching]","authors":"W. Horn, P. Singerl","doi":"10.1109/ESSCIR.2004.1356663","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356663","url":null,"abstract":"Switching inductive loads, without free-wheeling diodes, to achieve fast switch-off times, is an important application for integrated smart power circuits. It requires an integrated overvoltage protection and the ability of the integrated circuit to dissipate the energy stored in the inductive load within short periods of time. In this paper, an optimized demagnetization strategy is introduced which allows for switching off large inductive loads quickly without exceeding the critical junction temperature. It is shown that for a given power transistor, the energy capability can be increased by approximately 50% compared to the state-of-the-art switch-off procedure. A circuit implementation is presented which has been implemented on a testchip. Measurement results are shown which demonstrate the advantages of the new approach.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123477448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High-sensitivity, high-dynamic range 768 /spl times/ 576 pixel CMOS image sensor 高灵敏度、高动态范围768 /倍/ 576像素CMOS图像传感器
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356705
W. Brockherde, A. Bußmann, Christian Nitta, B. Hosticka, R. Wertheimer
{"title":"High-sensitivity, high-dynamic range 768 /spl times/ 576 pixel CMOS image sensor","authors":"W. Brockherde, A. Bußmann, Christian Nitta, B. Hosticka, R. Wertheimer","doi":"10.1109/ESSCIR.2004.1356705","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356705","url":null,"abstract":"This communication describes a high-sensitivity, high dynamic range 768/spl times/576 pixel image sensor fabricated in 0.5 /spl mu/m standard CMOS technology and its design. The pixel pitch is 10 /spl mu/m/spl times/10 /spl mu/m with a fill factor of 50% while the chip area is 90 mm/sup 2/. The dynamic range is 118 dB while the measured noise equivalent exposure is 66 pJ/cm/sup 2/ at 635 nm wavelength. This yields a sensitivity of just 4.9 ml/spl times/ at 20 ms integration time which makes it also suitable for night vision applications.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121385008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
1.5 GHz OPAMP in 120nm digital CMOS 1.5 GHz OPAMP在120nm数字CMOS
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356662
Franz Schlögl, H. Zimmermann
{"title":"1.5 GHz OPAMP in 120nm digital CMOS","authors":"Franz Schlögl, H. Zimmermann","doi":"10.1109/ESSCIR.2004.1356662","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356662","url":null,"abstract":"A high-speed operational amplifier, employing only regular-threshold devices in a 120 nm digital CMOS technology, with a two-signal-path topology, is presented. A single-stage high-frequency path allows a transit frequency of 1.5 GHz and a two-stage low-frequency path increases the DC gain to 40 dB. A new near-rail-to-rail class AB output stage is achieved with two local common-mode feedback loops.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114840227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
An integrated low power CMOS baseband analog design for direct conversion receiver 直接转换接收机的集成低功耗CMOS基带模拟设计
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356622
Minkyung Lee, I. Kwon, Kwyro Lee
{"title":"An integrated low power CMOS baseband analog design for direct conversion receiver","authors":"Minkyung Lee, I. Kwon, Kwyro Lee","doi":"10.1109/ESSCIR.2004.1356622","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356622","url":null,"abstract":"A low power CMOS receiver baseband analog (BBA) circuit, based on alternating filter and gain stages, is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of each block was performed to minimize current consumption. The fully integrated receiver BBA strip is fabricated in 0.18 /spl mu/m CMOS technology and an IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124088880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
An analog front-end for remote sensor applications with high input common-mode rejection including a 16bit /spl Sigma//spl Delta/ ADC in 0.35/spl mu/m 3.3V CMOS process 用于高输入共模抑制的远程传感器应用的模拟前端，包括0.35/spl mu/m 3.3V CMOS工艺中的16bit /spl Sigma//spl Delta/ ADC
Proceedings of the 30th European Solid-State Circuits Conference Pub Date : 2004-11-15 DOI: 10.1109/ESSCIR.2004.1356717
E. Compagne, Stephane Maulet, S. Genevey
{"title":"An analog front-end for remote sensor applications with high input common-mode rejection including a 16bit /spl Sigma//spl Delta/ ADC in 0.35/spl mu/m 3.3V CMOS process","authors":"E. Compagne, Stephane Maulet, S. Genevey","doi":"10.1109/ESSCIR.2004.1356717","DOIUrl":"https://doi.org/10.1109/ESSCIR.2004.1356717","url":null,"abstract":"Data acquisition through remote sensors can be exposed to very high electrical noise sources because sensor wiring acts like antennas for noise. Aircraft are particularly exposed to EMI, RFI radiations and I/spl times/R ground loops. The chip 'OctAD-16' has been designed for digitizing various DC and AC signals coming from onboard sensors with reduced loss of accuracy even with 150 V and several 100 MHz electrical aggressions. A standard 3.3 V CMOS process, without high voltage option, has been chosen to insure a long production life of the chip. In this paper, we describe the design solutions we have used to cope with such stringent requirements.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125199825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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