{"title":"直接转换接收机的集成低功耗CMOS基带模拟设计","authors":"Minkyung Lee, I. Kwon, Kwyro Lee","doi":"10.1109/ESSCIR.2004.1356622","DOIUrl":null,"url":null,"abstract":"A low power CMOS receiver baseband analog (BBA) circuit, based on alternating filter and gain stages, is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of each block was performed to minimize current consumption. The fully integrated receiver BBA strip is fabricated in 0.18 /spl mu/m CMOS technology and an IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.","PeriodicalId":294077,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference","volume":"109 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"An integrated low power CMOS baseband analog design for direct conversion receiver\",\"authors\":\"Minkyung Lee, I. Kwon, Kwyro Lee\",\"doi\":\"10.1109/ESSCIR.2004.1356622\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low power CMOS receiver baseband analog (BBA) circuit, based on alternating filter and gain stages, is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of each block was performed to minimize current consumption. The fully integrated receiver BBA strip is fabricated in 0.18 /spl mu/m CMOS technology and an IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.\",\"PeriodicalId\":294077,\"journal\":{\"name\":\"Proceedings of the 30th European Solid-State Circuits Conference\",\"volume\":\"109 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 30th European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIR.2004.1356622\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIR.2004.1356622","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An integrated low power CMOS baseband analog design for direct conversion receiver
A low power CMOS receiver baseband analog (BBA) circuit, based on alternating filter and gain stages, is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of each block was performed to minimize current consumption. The fully integrated receiver BBA strip is fabricated in 0.18 /spl mu/m CMOS technology and an IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.
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