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2022 IEEE 4th International Conference on Circuits and Systems (ICCS)最新文献

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A SECPE Circuit Based on Optimal Flipping Control for Weakly-Coupled Piezoelectric Energy Harvesters 基于最优翻转控制的弱耦合压电能量采集器SECPE电路
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936281
Jin Xiong, Huakang Xia
{"title":"A SECPE Circuit Based on Optimal Flipping Control for Weakly-Coupled Piezoelectric Energy Harvesters","authors":"Jin Xiong, Huakang Xia","doi":"10.1109/ICCS56666.2022.9936281","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936281","url":null,"abstract":"Piezoelectric energy (PE) harvesters can harvest vibration energy and convert it into electrical energy, which provides a promising solution to supply sustainable power for wireless sensor networks (WSN) applications. Synchronous electric charge extraction (SECE) technique can optimize the extracted power from a PE harvester regardless of the connected load; however, its performance degrades seriously when the PE harvester is in weakly-coupled ($k^{2}cdot Q_{m}lt lt0.75)$. In this letter, a synchronous electric charge partial extraction (SECPE) circuit is proposed for weakly-coupled piezoelectric energy harvesters. The SECPE circuit can flip the PE voltage to the value that is equal to the load voltage by utilizing the voltage clamping effect of a flyback transformer. It can also adjust the load voltage to the desired value through an optimal voltage flipping controller. The simulation on a weakly-coupled PE harvester shows that the prototyped SECPE circuit can extract a peak power of 243$mu$W with an open-circuit PE voltage of 3. 5V. Compared with the standard SECE, the output power is increased by 53% under the same conditions. This scheme can contribute to improve the energy extraction from weakly-coupled PE harvesters.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132167965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2-mW 0.3-to-1GHz Wide-Injection-Locking Multi-mode Transmitter with a 1-Mb/s Data Rate 2mw 0.3- 1ghz宽注入锁定多模发射机，数据速率为1mb /s
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936064
Yong Chen, Yushi Zhou, C. Boon, Pui-in Mak, R. Martins
{"title":"A 2-mW 0.3-to-1GHz Wide-Injection-Locking Multi-mode Transmitter with a 1-Mb/s Data Rate","authors":"Yong Chen, Yushi Zhou, C. Boon, Pui-in Mak, R. Martins","doi":"10.1109/ICCS56666.2022.9936064","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936064","url":null,"abstract":"This paper proposes a low-power multi-mode injection-locked transmitter (TX). A negative-transconductance active-inductor-based oscillator for the multi-mode modulations (e.g., ASK/FSK/BPSK) is designed to cover wide frequency bands, e.g., 400 MHz, 800 MHz, and 915 MHz. By making use of the injection locking technique, the phase noise of the active-inductor-based oscillator is lowered to the level that is close to the “clean” incident signal. To reduce the power consumption while providing operating flexibility, the TX is digitally controlled to switch the ASK/FSK/BPSK modulations. The proposed TX is fabricated in a 65-nm CMOS technology with a nominal supply voltage of 1 V. The measurement results show the TX prototype achieves the maximum data rate of 1 Mb/s with an output power of -12dBm under a 2-mW power consumption.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127620983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 24.9~34.5 GHz Injection-Locked Frequency Tripler Based on Top Differential Injection of Resonator 一种基于谐振腔顶差动注入的24.9~34.5 GHz锁注入三倍频器
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936584
Z. Zhong, Zhizhe Liu, Hong Mu, Z. Hu, Anan Li, T. Yang
{"title":"A 24.9~34.5 GHz Injection-Locked Frequency Tripler Based on Top Differential Injection of Resonator","authors":"Z. Zhong, Zhizhe Liu, Hong Mu, Z. Hu, Anan Li, T. Yang","doi":"10.1109/ICCS56666.2022.9936584","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936584","url":null,"abstract":"This paper proposes a broadband injection locking scheme to solve the problem of narrow locking bandwidth of traditional injection-locked frequency Tripler (ILFT). The scheme utilizes the differential injection technology to improve the even-order harmonics rejection ratio and injection signal current. The top injection technology of resonant tank based on transformer coupling is adopted to avoid the loop gain deterioration with using traditional source nodes injection and extend the locking bandwidth. The circuit is designed in a 55-nm CMOS process. The simulation results show that a 24.9~ 34.5 GHz (32.3% bandwidth) locking range has been achieved with the condition of lv supply voltage and 5dBm injected power. The DC power consumption of the core circuit of ILFT is 5. 07mW. The first, second, and fourth harmonic rejection ratio in the lock center is greater than 40 dBc.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116925204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Simple Numerical Solution Framework for Ordinary Differential Equations Based on Reduced MIPS Instructions 基于简化MIPS指令的常微分方程简单数值解框架
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936179
Qunkang Meng, Xianyang Jiang
{"title":"A Simple Numerical Solution Framework for Ordinary Differential Equations Based on Reduced MIPS Instructions","authors":"Qunkang Meng, Xianyang Jiang","doi":"10.1109/ICCS56666.2022.9936179","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936179","url":null,"abstract":"Recently, numerical solutions for Ordinary Differential Equations (ODEs) based on fourth-order Runge-Kutta method and fast Euler method are becoming more popular, however, necessary large memory and great volume of floating-point operations bring a high burden to traditional CPU. To attack this, a simple ODE numerical solution framework supporting both Euler method and fourth-order Runge-Kutta method is proposed. The framework includes three-level work: (1) in the algorithm level, the calculation principles and characteristics of Euler method and fourth-order Runge-Kutta method are analyzed; (2) in the hardware level, floating-point calculation units meeting IEEE 754 standard based on the reduced MIPS instruction set are worked out; (3) in the software level, a Linux server based on PYNQ device is built, so users can call the system through python programming. The calculation accuracy of the proposed framework is comparable to that of software calculation, and the framework has a maximum acceleration effect of 38 times compared to the pure PS ARM CPU.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114874852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigation on Heat Dissipation Performance of a Multi-channel Digital Array Module 多通道数字阵列模块散热性能研究
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936573
Zijun Wang, H. Guan
{"title":"Investigation on Heat Dissipation Performance of a Multi-channel Digital Array Module","authors":"Zijun Wang, H. Guan","doi":"10.1109/ICCS56666.2022.9936573","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936573","url":null,"abstract":"With the emergence of high-power and highly integrated digital array radar, the heat dissipation of digital array module is becoming increasingly prominent. In this study, the thermal design of a multi-channel digital array module was investigated. A liquid-filled cold plate for structural support and heat dissipation was designed, on which double-layer bumps were proposed to enhance the heat conduction path of internal devices, and the heat transfer process of the digital array module was analyzed by thermal simulation. The results show that the temperatures of all devices in the digital array module are below 85°C, which meets the design requirements. Meanwhile, the influence of the bump’s layout and width on the device temperature was analyzed, and the heat dissipation mechanism of the double-layer bumps was revealed. The design ideas proposed in this paper can provide more effective solutions for the heat dissipation of a multi-channel digital array module.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114645207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Ultra-Low Power Time-Domain Temperature Sensor for IoT Applications 一种物联网应用的超低功耗时域温度传感器
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936345
Xueting Pang, Kangkang Sun, Jian Guan, Yuqi Lin, Zhipeng Li, Feng Yan, Jingjing Liu, Yuan Jiang
{"title":"An Ultra-Low Power Time-Domain Temperature Sensor for IoT Applications","authors":"Xueting Pang, Kangkang Sun, Jian Guan, Yuqi Lin, Zhipeng Li, Feng Yan, Jingjing Liu, Yuan Jiang","doi":"10.1109/ICCS56666.2022.9936345","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936345","url":null,"abstract":"This paper proposed an ultra-low power time-domain temperature sensor circuit for IoT applications. It uses 2- T structures to generate reference voltage and complementary-to-absolute-temperature (CTAT) voltage. The reference voltage produces reference current by using current mirror to charge the capacitor. Then the voltage of capacitor is compared with the CTAT voltage to generate a temperature-dependent pulse. The pulse width is then digitized to represent the temperature. The temperature sensor is designed using 0.1S $mu$m CMOS process. The simulation results show that it measures temperature from −10°C to 60°C from 1V supply voltage. The power it costs is 570nW at a conversion speed of100 Sa/s.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126401142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Review of Measuring Methods for Corona Current Pulses 电晕电流脉冲测量方法综述
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936238
Zhenguo Wang, L. Ni, Xiangxian Zhou, Te Li, Xuxiang Wu, Qi Gao, Yifeng Ma
{"title":"A Review of Measuring Methods for Corona Current Pulses","authors":"Zhenguo Wang, L. Ni, Xiangxian Zhou, Te Li, Xuxiang Wu, Qi Gao, Yifeng Ma","doi":"10.1109/ICCS56666.2022.9936238","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936238","url":null,"abstract":"The measurement of corona current pulse is one important method for the study of corona discharge. Since corona current pulse is induced by the moving space charges generated by air ionization, there are many methods for the measurement of corona current pulses. This paper reviews the general measuring methods for corona current pulses and compares the advantages and disadvantages of the different methods. Finally, the suggestions on the selection of the measuring methods are presented.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115322124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Blocker Tolerant N-path Filter with Tunable Notches for Software-Defined Radio Applications 软件无线电应用中具有可调陷波的耐阻塞n路滤波器
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936140
Ran Bu, Zhaolin Yang, Xiaoming Liu, J. Jin
{"title":"A Blocker Tolerant N-path Filter with Tunable Notches for Software-Defined Radio Applications","authors":"Ran Bu, Zhaolin Yang, Xiaoming Liu, J. Jin","doi":"10.1109/ICCS56666.2022.9936140","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936140","url":null,"abstract":"In this paper, a blocker-tolerant N-path filter (BTNPF) with tunable notches is proposed for software-defined radio utilization. Two notches are created by the cancellation of the transmitted signals from two parallel paths. The notch frequency and attenuation can be adjusted by tuning the gain and bandwidth of the two paths. The tunable notch provides a good tolerance to close-in blockers. The proposed BT-NPF can achieve an 18. 5~26.6dB gain with a bandwidth of 8. 4~14.8MHz, a frequency tuning range of 0. 1~1.5GHz, and a noise Figure of 4. 4~5.9dB. The out-of-band IIP3 is 20. 5dBm and blocker P1dB is 0dBm. The noise Figure degrades only 0. 8dB in the presence of a 0dBm blocker with an offset frequency of 80MHz.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125707776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 32-Channel Time-to-Digital Converter with 20-ps Resolution for ToF Applications 32通道时间-数字转换器，20ps分辨率，用于ToF应用
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936246
Qin Ke, Hang Yu, Yan Li, Siguang Ma, D. Xi, Rui Chen
{"title":"A 32-Channel Time-to-Digital Converter with 20-ps Resolution for ToF Applications","authors":"Qin Ke, Hang Yu, Yan Li, Siguang Ma, D. Xi, Rui Chen","doi":"10.1109/ICCS56666.2022.9936246","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936246","url":null,"abstract":"Single-photon avalanche diodes (SPAD) enable sensitive detection of single photons under ultra-weak light conditions. Combined with direct time-of-flight (ToF) measurements, SPAD sensors are widely used in 3D imaging systems. Time-to-Digital Converter (TDC) can accurately measure time intervals in picoseconds, which is widely used for direct TOF measurements. This paper proposes a 32-channel TDC of two-level architecture containing a delay locked loop (DLL) and a vernier delay line (VDL) loop to increase timing accuracy. Designed in a 180 nm CMOS process, the TDC occupies an area of 4.1 mm $times$ 3.6 mm and achieves 20 ps resolution at 2 Msps measurement rate.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"188 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116406529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Lossless Reference Frame Compression Combined with Read and Write Behaviors of HEVC and VVC Codecs 结合HEVC和VVC编解码器读写行为的无损参考帧压缩
2022 IEEE 4th International Conference on Circuits and Systems (ICCS) Pub Date : 2022-09-23 DOI: 10.1109/ICCS56666.2022.9936212
Tingting Li, Leilei Huang, Yibo Fan
{"title":"Lossless Reference Frame Compression Combined with Read and Write Behaviors of HEVC and VVC Codecs","authors":"Tingting Li, Leilei Huang, Yibo Fan","doi":"10.1109/ICCS56666.2022.9936212","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936212","url":null,"abstract":"With the emergence of immersive videos like 8K@l20fps, memory bandwidth induced by reference frames is gradually becoming the bottleneck of codecs. This paper analyzes related data caching strategies and then proposes a lossless reference frame compression algorithm and its hardware implementation, which combines read and write behaviors of High Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC) codecs. The basic block of this algorithm has adaptive sizes, which would be predicted with the median edge detector (MED) and encoded with optimized semi-fixed-length (SFL) coding. For HEVC and VVC sequences, results demonstrate an average reduction of 68.22% and 74.49% in memory bandwidth. The corresponding compressor and decompressor take 36. 9K and 50. 6K gates when implemented with TSMC 65nm technology, which could achieve high throughputs of11.47 and 6.27 Gpixels/s respectively, equivalent to 8K@267fps and 8K@l88fps.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"420 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122862792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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