{"title":"Systematic Design of a Broadband Reflective-Type Phase Shifter with Minimal Loss Variation and High Phase Accuracy","authors":"Chunhui Fang, Tong Li, Yong Chen, Yue Lin, Hongtao Xu","doi":"10.1109/ICCS56666.2022.9936288","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936288","url":null,"abstract":"This paper presents a systematic design method of a broadband reflective phase shifter (RTPS) with low phase error and minimal loss variation. In general, RTPS consists of the quadrature coupler and reflective loads. The effect of imperfect quadrature coupler and reflective loads is analyzed in this paper. To verify this theoretical analysis, a RTPS including transformer-based coupler with high coupling coefficient and capacitive reflective loads is designed. This RTPS was implemented in 40nm CMOS technology, that demonstrated the phase shifting range of 61.875°, low RMS phase error of 2° and ultralow loss variation of ±0.14dB from 20GHz to 34GHz. With the advantages of compact chip size (0.028 mm2) and ultralow loss variation, this proposed 61. 875° RTPS can be easily extended to a larger phase shifting range by cascading multiple stages.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134509763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wangdong He, Xi Chen, Jianhao Gong, Anyong Hu, Ruochen Gu, Julia H. Miao
{"title":"A Ka-Band Analog Complex Correlator Based on Integrated Six-Port Chip for Millimeter-Wave Temperature Measurement","authors":"Wangdong He, Xi Chen, Jianhao Gong, Anyong Hu, Ruochen Gu, Julia H. Miao","doi":"10.1109/ICCS56666.2022.9936136","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936136","url":null,"abstract":"In this paper, the design and measurement of a Ka-band (32-36 GHz) analog complex correlator based on integrated six-port chip for human body temperature measurement are described. The designed correlator uses the add-and-square method by employing six-port distribution network and zero-bias Schottky diodes. Moreover, the integrated six-port chip, which integrates amplifiers, phase shifters, and a six-port circuit, is applied in the correlator to realize a compact size. To verify the characteristics of the analog correlator, the single-frequency test with different input power levels and the sweep-frequency test with input power fixed are applied to the correlator. The measurement results reveal that the input power of the correlator should be less than -35dBm and the correlation efficiency is larger than 92%.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128755920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 36MHz Relaxation Oscillator with±0.2% Temperature Variation for MCU Application","authors":"Jianbao Xia, Zhiming Chen","doi":"10.1109/ICCS56666.2022.9936163","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936163","url":null,"abstract":"This paper presents an on-chip 36MHz high precision relaxation oscillator with voltage averaging feedback for MCU (microcontroller unit) applications. The proposed design is fabricated in 0.11-um CMOS process, the relaxation oscillator consumes 78uA. The frequency variation with supply voltage is reduced by a internal LDO(low dropout regulator) circuit, with a wide input range of I.S-5V, the measured frequency variation with supply voltage is within ±0.02%. The measured frequency variations is ±0.2% over a temperature range of −45°C-105°C. It has low temperature shift characteristics in the oscillation frequency range, which is very suitable for MCU’s requirements for multi-system clock frequency.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134424947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of Hysteresis Comparator with Wide Common Mode Operating Range","authors":"Yuhao Yao, Mei Jiang","doi":"10.1109/ICCS56666.2022.9936471","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936471","url":null,"abstract":"In order to improve the ability of hysteresis comparators to suppress noise and interference signals and expand their common mode operating range, an improved hysteresis comparator circuit is proposed based on the analysis of the relationship between input common mode range, the tail current and the flip voltage, utilizing the common mode signal to realize adaptive bias of tail current transistor. Using SMIC 0.18$mu$m 1P6M CMOS technology, the simulation results show that when supply voltage is 1.8V, 2.2V and 2.8V respectively, the proposed hysteresis comparator can work normally under the input common mode voltage changes from 0 to 1.5V at five process corners (TT, SS, FF, FS and SF).","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125509796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhouji Du, Xinchao Zhong, Haiquan Li, Yan Li, Hang Yu
{"title":"A Coarse Count Error Cancellation System Designed for High-Accuracy TDC","authors":"Zhouji Du, Xinchao Zhong, Haiquan Li, Yan Li, Hang Yu","doi":"10.1109/ICCS56666.2022.9936290","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936290","url":null,"abstract":"Time-to-Digital Converter (TDC) uses a hybrid approach to achieve both long-time interval and high resolution. However, as external input signal is asynchronous with the internal working clock of the TDC, there will be ±1 clock cycle error due to the setup time of the TDC clock, which results in coarse time error, seriously affecting TDC timing accuracy. Aiming at the problem, a coarse count error cancellation system is proposed in this work. An extra delay is added to the input pulse to obtain a delayed pulse, and a double sampling mechanism is realized to simultaneously memorize the count values of both the original input pulse and the delayed one. The error is then obtained by comparison. Implemented in a DE2-115 FPGA development platform and tested with different delay values, the proposed system shows a significant ability to effectively reduce the coarse count error in a TDC timing system.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129234481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Compact Digital-Controlled Soft-Start Circuit of DC-DC Switching Converter for Portable Devices","authors":"Kun Zhang","doi":"10.1109/ICCS56666.2022.9936264","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936264","url":null,"abstract":"This paper proposes a compact digital-controlled soft-start circuit of DC-DC switching converter for portable devices to prevent massive inrush current and overshoot voltage during the start-up period of the converter. Portable devices like virtual reality glasses and portable medical sensors require high stability, portability and low costs. Taking all of them into consideration, the proposed soft-start circuit of DC-DC switching converter for portable devices realizes the soft-start function without off-chip capacitor, large on-chip capacitor or additional resistor, thereby minimizing the implementation area and reducing the cost. The proposed soft-start circuit which is digital-controlled is mainly composed of a 4-bit resistor-string digital-to-analog converter (RDAC) and a 2-bit voltage divider implemented by stacked diode-connected transistors. The novel soft-start circuit has been designed with a 0. 1 $mathrm{S}mu mathrm{m}$ CMOS process as part of a buck converter and only occupies 0.00483 mm2 on silicon with a supply voltage of 3.3 V.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126955898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling and Analysis of DC-DC CUK Converter with Coupled Inductors","authors":"Fatih M. Tuztasi, A. Yildiz, Hasan Kelebek","doi":"10.1109/ICCS56666.2022.9936378","DOIUrl":"https://doi.org/10.1109/ICCS56666.2022.9936378","url":null,"abstract":"In this article, the analysis of the inductive coupled CUK topology, which is a DC-DC converter, which is of great importance for power electronics and used in structures such as electric vehicles and PV systems, with Modified Nodal Analysis (MNA) and the modeling of the elements in the circuit structure will be explained. The numerical values of the semiconductors and passive circuit elements to be modeled will be given the voltage, and current at the output will be calculated. In addition, the graphs of the parameters analyzed with MNA will be created with the code system written in the MATLAB environment and will be explained in this article.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128892103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}