{"title":"Lossless Reference Frame Compression Combined with Read and Write Behaviors of HEVC and VVC Codecs","authors":"Tingting Li, Leilei Huang, Yibo Fan","doi":"10.1109/ICCS56666.2022.9936212","DOIUrl":null,"url":null,"abstract":"With the emergence of immersive videos like 8K@l20fps, memory bandwidth induced by reference frames is gradually becoming the bottleneck of codecs. This paper analyzes related data caching strategies and then proposes a lossless reference frame compression algorithm and its hardware implementation, which combines read and write behaviors of High Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC) codecs. The basic block of this algorithm has adaptive sizes, which would be predicted with the median edge detector (MED) and encoded with optimized semi-fixed-length (SFL) coding. For HEVC and VVC sequences, results demonstrate an average reduction of 68.22% and 74.49% in memory bandwidth. The corresponding compressor and decompressor take 36. 9K and 50. 6K gates when implemented with TSMC 65nm technology, which could achieve high throughputs of11.47 and 6.27 Gpixels/s respectively, equivalent to 8K@267fps and 8K@l88fps.","PeriodicalId":293477,"journal":{"name":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","volume":"420 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 4th International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS56666.2022.9936212","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
With the emergence of immersive videos like 8K@l20fps, memory bandwidth induced by reference frames is gradually becoming the bottleneck of codecs. This paper analyzes related data caching strategies and then proposes a lossless reference frame compression algorithm and its hardware implementation, which combines read and write behaviors of High Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC) codecs. The basic block of this algorithm has adaptive sizes, which would be predicted with the median edge detector (MED) and encoded with optimized semi-fixed-length (SFL) coding. For HEVC and VVC sequences, results demonstrate an average reduction of 68.22% and 74.49% in memory bandwidth. The corresponding compressor and decompressor take 36. 9K and 50. 6K gates when implemented with TSMC 65nm technology, which could achieve high throughputs of11.47 and 6.27 Gpixels/s respectively, equivalent to 8K@267fps and 8K@l88fps.