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Simulation Study and Reduction of Reverse Gate Leakage Current for GaN HEMTs GaN hemt反栅漏电流的仿真研究与减小
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340088
Y. Yamaguchi, K. Hayashi, T. Oishi, H. Otsuka, T. Nanjo, K. Yamanaka, M. Nakayama, Y. Miyamoto
{"title":"Simulation Study and Reduction of Reverse Gate Leakage Current for GaN HEMTs","authors":"Y. Yamaguchi, K. Hayashi, T. Oishi, H. Otsuka, T. Nanjo, K. Yamanaka, M. Nakayama, Y. Miyamoto","doi":"10.1109/CSICS.2012.6340088","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340088","url":null,"abstract":"The two-dimensional effect in the reverse gate leakage current of GaN HEMTs is studied by using the TCAD simulation. At the high voltage region, the extension of the potential from the gate to the drain latterly is important role for the reverse gate leakage current characteristics. On the other hands, the electrons flow vertically from the gate electrode to the GaN channel layer at the low gate voltage. Our model explained excellently the experimental results on wide voltage range from low to 80 V. In addition, we studied the gate annealing process as one of the gate current reduction method.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130013055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Multi-Gate pHEMT Modeling for Switch Applications 开关应用的多栅极pHEMT建模
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340063
Cejun Wei, H. Yin, O. Klimashov, Yu Zhu, D. Bartle
{"title":"Multi-Gate pHEMT Modeling for Switch Applications","authors":"Cejun Wei, H. Yin, O. Klimashov, Yu Zhu, D. Bartle","doi":"10.1109/CSICS.2012.6340063","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340063","url":null,"abstract":"Multi-gate pHEMTs are extensively used in pHEMT switch circuits for wireless communication applications due to their size advantage. The intuitive modeling approach which considers a multiple-gate pHEMT to be a stack of single-gate FETs is far from adequate. Crucial factors in multi-gate pHEMT modeling include accurate leakage, CV below pinch-off, surface traps effects, and distribution features for large size switch FETs. In this paper we will address certain techniques to model both intrinsic FETs and extrinsic parasitic components. Our multi-gate pHEMT model was verified by comparisons of a variety of performances between modeled and measured data, including leakages, floating voltages, and CV curves on device level. In a switch application, comparisons of harmonics as a function of frequency at high driving power for both GSM and DCS bands show excellent agreement between model prediction and measured data as well.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123858908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A Compact Fully Integrated High-Efficiency 5GHz Stacked Class-E PA in 65nm CMOS Based on Transformer-Based Charging Acceleration 基于变压器充电加速的65nm CMOS紧凑全集成高效5GHz堆叠级e级PA
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340115
Jing Chen, R. Bhat, H. Krishnaswamy
{"title":"A Compact Fully Integrated High-Efficiency 5GHz Stacked Class-E PA in 65nm CMOS Based on Transformer-Based Charging Acceleration","authors":"Jing Chen, R. Bhat, H. Krishnaswamy","doi":"10.1109/CSICS.2012.6340115","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340115","url":null,"abstract":"Device stacking enables CMOS power amplifiers (PAs) to increase the maximum achievable output voltage swing by sharing the voltage stress across multiple stacked devices, leading to higher output power and efficiency. A key requirement in stacked class-E power amplifiers is the creation of class-Elike voltage swings at the intermediary nodes. In this paper, we propose a transformer-based charging acceleration technique for stacked class-E PAs. Specifically, in a 2- stacked class-E PA, a shunt inductor is connected at the intermediary node and is magnetically coupled to the choke inductor. When compared with the conventional approach of using an uncoupled shunt inductor, the transformer-based charging acceleration approach significantly reduces the sizes of both inductors and also eliminates the extra area of the shunt inductor through vertical stacking of the windings. Because of the reduced inductor sizes, the associated loss is also reduced leading to an improvement in efficiency of approximately 7% for the 5GHz prototype described here. The differential 5GHz class-E prototype is fabricated in a standard 65nm low-power (LP) CMOS process (IBM 10LPe), and achieves a drain efficiency of 42% and an output power of 19.7dBm while consuming only 0.31mm2 of chip area.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128864877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Fundamental Frequency 143-152 GHz Radar Transceiver with Built-In Calibration and Self-Test 一种内置校准和自检的基频143-152 GHz雷达收发器
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340072
I. Sarkas, M. Girma, J. Hasch, T. Zwick, S. Voinigescu
{"title":"A Fundamental Frequency 143-152 GHz Radar Transceiver with Built-In Calibration and Self-Test","authors":"I. Sarkas, M. Girma, J. Hasch, T. Zwick, S. Voinigescu","doi":"10.1109/CSICS.2012.6340072","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340072","url":null,"abstract":"This paper presents a 143-152 GHz radar transceiver that incorporates several self-test and calibration features to facilitate simple production testing, as well as correction of the analog front-end impairments. The transceiver was designed and fabricated in a production 130-nm SiGe BiCMOS technology and adopts a two channel heterodyne architecture that allows for the use of a low-IF frequency plan. Measurement results, presented both for the transceiver and for standalone circuit breakouts, demonstrate receiver DSB NF of 9-11 dB and transmitter output power of -12 dBm at the antenna port. The power consumption is 800 mW for 1.2 and 1.8 V power supplies.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122754683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
MMICs and Remote Sensing Science Instruments - A Technology Success Story mmic和遥感科学仪器-一个技术成功的故事
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340096
T. Gaier
{"title":"MMICs and Remote Sensing Science Instruments - A Technology Success Story","authors":"T. Gaier","doi":"10.1109/CSICS.2012.6340096","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340096","url":null,"abstract":"Developments in GaAs and InP transistor technology has had a large impact on science. With low noise and high frequency performance, these devices have revolutionized radio astronomy and Earth science, and changed the way that space science missions are designed and implemented. MMIC integration has shortened mission development times and enabling missions to be efficiently implemented in a cost-constrained environment. MMICs have also enabled a new generation of receiver arrays, creating a paradigm shift in experimental design. Some of this history will be discussed, citing specific examples of technology insertion and the impact on science.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115779371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PHEMT-Based Ultrawideband Low Noise Amplifier with Room-Cryogenic Temperature Operability 基于phemm的室温低温操作超宽带低噪声放大器
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340095
H. Vemuri, S. Velicu, A. Gilmore, C. Grein, A. Mattamana, T. Quach, P. Orlando, C. Campbell
{"title":"PHEMT-Based Ultrawideband Low Noise Amplifier with Room-Cryogenic Temperature Operability","authors":"H. Vemuri, S. Velicu, A. Gilmore, C. Grein, A. Mattamana, T. Quach, P. Orlando, C. Campbell","doi":"10.1109/CSICS.2012.6340095","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340095","url":null,"abstract":"An ultra wideband MMIC low noise amplifier (LNA) based on the 0.15-μm pHEMT 3MI Triquint power process has been demonstrated. A feedforward noise cancellation technique was employed to reduce the thermal noise in the LNA. The LNA has a surface area of 2 mm by 2 mm. The gain of LNA is 15 dB between 400 MHz and 12.5 GHz with ±0.3dB gain flatness across the band. The return loss at both input and output is better than -10 dB. The measured noise figure at 300 K varied between 1.5 dB at 400 MHz and 2.6 dB at 12 GHz, and the MMIC's DC power consumption is less than 200 mW. The LNA was further characterized at cryogenic temperatures in terms of gain, input/output return loss and noise figure. The noise figure measured at 100 K dropped to 1.1 dB at 12 GHz. The gain improved at cryogenic temperatures, the overall variation in the gain between 300 K and 100 K is less than 2 dB while the input and output return losses did not change significantly. This wideband LNA can be used in applications requiring low noise and/or low temperatures.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"259 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127540456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
60-GHz CMOS Direct-Conversion Transceiver Using Injection-Lock Oscillators 使用注入锁振荡器的60 ghz CMOS直接转换收发器
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340069
K. Okada
{"title":"60-GHz CMOS Direct-Conversion Transceiver Using Injection-Lock Oscillators","authors":"K. Okada","doi":"10.1109/CSICS.2012.6340069","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340069","url":null,"abstract":"This paper presents a 60-GHz direct-conversion RF front-end realizing full 4-channel wireless communication. The 65-nm CMOS front-end consumes 319mW and 223mW in transmitting and receiving mode, respectively. It is capable of more than 7-Gb/s 16QAM wireless communication for every channel of the 60-GHz standards, which can be extended up to 10Gb/s.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"14 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114012641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of Wide Tuning-Range mm-Wave VCOs Using Negative Capacitance 利用负电容设计宽调谐范围毫米波压控振荡器
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340077
Qiyang Wu, T. Quach, A. Mattamana, S. Elabd, S. Dooley, J. Mccue, P. Orlando, G. Creech, W. Khalil
{"title":"Design of Wide Tuning-Range mm-Wave VCOs Using Negative Capacitance","authors":"Qiyang Wu, T. Quach, A. Mattamana, S. Elabd, S. Dooley, J. Mccue, P. Orlando, G. Creech, W. Khalil","doi":"10.1109/CSICS.2012.6340077","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340077","url":null,"abstract":"Negative capacitance (NC) circuits of single-ended and differential topologies are presented, analyzed and characterized. The novel NC designs extend the bandwidth of conventional NC circuits while maintaining low power consumption. To compare the performance of the designs, a figure of merit (FOM) is proposed. A power and area efficient NC scheme employing a 130 nm CMOS technology is applied to a mm-wave LC Voltage Controlled Oscillator (LC-VCO) for demonstration. The VCO tuning range is extended by employing the NC circuit to cancel the parasitic capacitance of the LC-tank; resulting in a 35% tuning range increase as compared to the reference LC-VCO circuit. The NC-based LC-VCO achieved a 27% tuning range in the Q-Band, which is the highest reported. Measured results compare closely to the theoretical analysis of the LC-VCO operating from 34.5-45.4 GHz.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122179426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Highly Integrated E-Band Direct Conversion Receiver 高度集成的e波段直接转换接收机
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340099
M. Ferndahl, M. Gavell, M. Abbasi, H. Zirath
{"title":"Highly Integrated E-Band Direct Conversion Receiver","authors":"M. Ferndahl, M. Gavell, M. Abbasi, H. Zirath","doi":"10.1109/CSICS.2012.6340099","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340099","url":null,"abstract":"This paper presents a highly integrated 70-98 GHz direct conversion receiver with 3 stage LNA, x6 frequency multiplier with buffer amplifier, and IQ-mixer suitable for Eband radio communication. The LNA, x6 and IQ-mixer are also presented separately. The LNA covers 65 to 95 GHz with 15 dB gain and minimum 5.5 dB noise figure, x6 covers 71 to 91 GHz with 0 to 8 dBm output power and the IQ-mixer an RF frequency from 70 to 95 GHz and IF frequency from DC to 12 GHz with only 8 dB conversion loss and better than 15 dB image reject. The complete receiver circuit shows an RF bandwidth of 70 to 98 GHz, LO bandwidth of 75 to 92 GHz and IF bandwidth from DC to more than 12 GHz. The conversion gain is 3 to 6 dB with a noise figure of 5 to 7 dB, the image rejection 15 dB to as high as 28 dB, and the input 1 dB compression point -12 dBm.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116758344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 1.8 V SiGe BiCMOS Cable Equalizer with 40-dB Peaking Control up to 60 GHz 一个1.8 V SiGe BiCMOS电缆均衡器与40db峰值控制高达60ghz
2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2012-10-25 DOI: 10.1109/CSICS.2012.6340053
I. Sarkas, S. Voinigescu
{"title":"A 1.8 V SiGe BiCMOS Cable Equalizer with 40-dB Peaking Control up to 60 GHz","authors":"I. Sarkas, S. Voinigescu","doi":"10.1109/CSICS.2012.6340053","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340053","url":null,"abstract":"A low-noise, digitally-assisted broadband cable equalizer with 26 dB gain and over 40 dB of gain and peaking control from DC to 60 GHz was designed and fabricated in a production 130-nm SiGe BiCMOS technology. The circuit features a low-voltage and low-noise TIA input stage, and digitally variable gain cells based on MOS-HBT cascodes. Equalization of 44 and 78.6-Gb/s data rates over 6 and 4 m long coaxial cables with 30 dB attenuation at the respective Nyquist frequency is demonstrated. The chip consumes 250 mW from a single 1.8 V supply.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115999767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
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