A Compact Fully Integrated High-Efficiency 5GHz Stacked Class-E PA in 65nm CMOS Based on Transformer-Based Charging Acceleration

Abstract

Device stacking enables CMOS power amplifiers (PAs) to increase the maximum achievable output voltage swing by sharing the voltage stress across multiple stacked devices, leading to higher output power and efficiency. A key requirement in stacked class-E power amplifiers is the creation of class-Elike voltage swings at the intermediary nodes. In this paper, we propose a transformer-based charging acceleration technique for stacked class-E PAs. Specifically, in a 2- stacked class-E PA, a shunt inductor is connected at the intermediary node and is magnetically coupled to the choke inductor. When compared with the conventional approach of using an uncoupled shunt inductor, the transformer-based charging acceleration approach significantly reduces the sizes of both inductors and also eliminates the extra area of the shunt inductor through vertical stacking of the windings. Because of the reduced inductor sizes, the associated loss is also reduced leading to an improvement in efficiency of approximately 7% for the 5GHz prototype described here. The differential 5GHz class-E prototype is fabricated in a standard 65nm low-power (LP) CMOS process (IBM 10LPe), and achieves a drain efficiency of 42% and an output power of 19.7dBm while consuming only 0.31mm2 of chip area.