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2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)最新文献

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A K-Band Differential SiGe Stacked Power Amplifier Based on Capacitive Compensation Techniques for Gain Enhancements 基于电容补偿技术的k波段差分SiGe堆叠功率放大器增益增强
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885017
X. S. Loo, K. Yeo, M. Win, Zhichao Li, Xiaopeng Yu, Jer-Ming Chen
{"title":"A K-Band Differential SiGe Stacked Power Amplifier Based on Capacitive Compensation Techniques for Gain Enhancements","authors":"X. S. Loo, K. Yeo, M. Win, Zhichao Li, Xiaopeng Yu, Jer-Ming Chen","doi":"10.1109/MWSCAS.2019.8885017","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885017","url":null,"abstract":"A 20GHz differential 4-stacked power amplifier fabricated on 0.18μm SiGe technology is presented. Uniquely, 2 capacitive compensation techniques are introduced at common base stages and successfully boosting power gain by 2.56dB/stage. Inter-stage matching inductors are adopted and input biasing is achieved by emitter follower for reliability concern. It demonstrates favorable gain performance of >20dB against other stacking schemes while showing competitive saturated power of ≈22dBm with peak PAE of 26%.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121905643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
VLSI Architecture Design of 9/7 Discrete Wavelet Transform for Image Processing 用于图像处理的9/7离散小波变换VLSI架构设计
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885044
Sadaf Javed, Ch. Jabbar Younis, Mehboob Alam, Y. Massoud
{"title":"VLSI Architecture Design of 9/7 Discrete Wavelet Transform for Image Processing","authors":"Sadaf Javed, Ch. Jabbar Younis, Mehboob Alam, Y. Massoud","doi":"10.1109/MWSCAS.2019.8885044","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885044","url":null,"abstract":"In image processing, transform coding de-correlates images to pre-condition them for efficient compression. In this work, we propose VLSI architecture design of a hardware-efficient 9/7 Discrete Wavelet Transform (DWT). The architecture takes advantage of Canonical Signed Digit (CSD) and Distributed Arithmetic (DA) to represent and optimally distribute co-efficients to reduce the number of adder and shift registers. In addition, the co-efficient multiplication also exploits the horizontal and vertical redundancy in the architecture to reduce the hardware computational complexity. The result is a filter-based design, exploiting hardware path of architecture using CSD coefficients, which finds minimum realization. The proposed architecture is simulated using Verilog Hardware Description Language (HDL). A comparison with other architectures of 9/7 DWT shows a 18.75% reduction in hardware. The result is a hardware-efficient architecture, which provides a low-power solution for image and signal processing applications.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126239093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A high speed, high conversion gain RF envelope detector for SRO-receivers 用于sro接收机的高速，高转换增益射频包络检测器
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884942
Ximing Fu, K. El-Sankary, Jianjun J. Zhou
{"title":"A high speed, high conversion gain RF envelope detector for SRO-receivers","authors":"Ximing Fu, K. El-Sankary, Jianjun J. Zhou","doi":"10.1109/MWSCAS.2019.8884942","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884942","url":null,"abstract":"A high speed and high conversion gain envelope detector (ED) is designed for RF super-regenerative-oscillator (SRO) receivers. To reduce glitches from RC filtering used for common mode signal rejection, the proposed ED is implemented using a band-pass buffer as a first stage. To avoid introducing excessive time delay and maintain good performance under high data rate, the proposed design introduces back-to-back inverters operating in linear mode to enhance the conversion gain while reducing the settling time. Simulation results using 0.18um CMOS technology shows that the proposed ED achieves a high data rate of 6.66Mbps while consuming 8.45μW.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126377790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 10-MHz Current-Mode Fixed-Frequency Hysteretic Controlled DC-DC Converter With Fast Transient Response 具有快速瞬态响应的10mhz电流模式固定频率迟滞控制DC-DC变换器
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885176
Siddharth Agarwal, A. Maity
{"title":"A 10-MHz Current-Mode Fixed-Frequency Hysteretic Controlled DC-DC Converter With Fast Transient Response","authors":"Siddharth Agarwal, A. Maity","doi":"10.1109/MWSCAS.2019.8885176","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885176","url":null,"abstract":"This paper proposes a fixed-frequency current-mode hysteretic controlled DC-DC buck converter operating at 10 MHz. The proposed converter senses the inductor current through a current-sensing filter and compares the sense-node voltage with only one threshold of the hysteretic comparator. The reference clock synchronizes the switching frequency of the converter by forcedly altering the present state of the hysteretic comparator. The proposed converter is targeted to switch at a frequency of 10 MHz with the output filter components of L=200 nH and C=4.7 µF. The simulation results show that the maximum overshoot and the settling time are below 12 mV and 1.9 µs respectively while the load changes from 50 mA to 450 mA within 1 ns time. The output voltage load regulation is 2.5 mV/A.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129816109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A LiDAR based proximity sensing system for the visually impaired spectrum 一种基于激光雷达的视障光谱近距离传感系统
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884887
N. Krishnan
{"title":"A LiDAR based proximity sensing system for the visually impaired spectrum","authors":"N. Krishnan","doi":"10.1109/MWSCAS.2019.8884887","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884887","url":null,"abstract":"A low-cost LiDAR embedded proximity sensing system is conceptualized and prototyped targeting the needs of the Blind and Deaf-Blind. The efficacy of low-cost LiDAR is studied and its applicability is demonstrated using a single microcontroller. Servo based panning of the LiDAR is integrated enabling a 2D topographical capture, which is mapped to the brain by a novel audio balance technique. For the deaf-blind, an alternative haptic glove is devised with haptic mapping. Finally, an active in-motion (AIM) guidance is proposed by harvesting the data dynamically and providing the user a directional guidance actively.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130233729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Current-Density-Enhanced 12V-to-1.2V/10A, AOT-Controlled, 4-Phase Series-Capacitor Buck Converter with Embedded Current Balancing 电流密度增强12v -1.2 v /10A、aot控制、内置电流平衡的4相串联电容降压变换器
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885397
Shuyu Zhang, Menglian Zhao, Hoi Lee
{"title":"A Current-Density-Enhanced 12V-to-1.2V/10A, AOT-Controlled, 4-Phase Series-Capacitor Buck Converter with Embedded Current Balancing","authors":"Shuyu Zhang, Menglian Zhao, Hoi Lee","doi":"10.1109/MWSCAS.2019.8885397","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885397","url":null,"abstract":"This paper presents a 4-phase series-capacitor buck converter (SCB) for high step-down-ratio, high-current point-of-load applications. A current-balancing strategy embedded in the adaptive-on-time controller is proposed to effectively address the inductor current mismatch between different phases. This significantly reduces the required size of the external inductor and thus the converter volume. The proposed current balancing scheme also saves 2 current sensors compared to that of the traditional 4-phase interleaved buck converters. Implemented in a 0.35µm CMOS technology, the proposed 4-phase SCB converter with e-mode GaN FETs supports the full load of 10A and achieves the peak power efficiency of 92.5% under 12V-to-1.2V conversion and 2.5MHz/phase operation. The load current is verified to be equally distributed among 4 phases in both steady-state and transient conditions. Compared to state-of-the-art converters from industry and literature, the proposed 4-phase SCB converter simultaneously achieves the highest power efficiency and the largest current density.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129274224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Modeling of Silicon Photomultiplier Based on Perimeter Gated Single Photon Avalanche Diode 基于周长门控单光子雪崩二极管的硅光电倍增管建模
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885330
Mst Shamim Ara Shawkat, Md. Sakib Hasan, N. Mcfarlane
{"title":"Modeling of Silicon Photomultiplier Based on Perimeter Gated Single Photon Avalanche Diode","authors":"Mst Shamim Ara Shawkat, Md. Sakib Hasan, N. Mcfarlane","doi":"10.1109/MWSCAS.2019.8885330","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885330","url":null,"abstract":"In this paper, we present a new electrical model for perimeter gated single photon avalanche diode (PGSPAD) based silicon photomultiplier (SiPM) detector. A PGSPAD is a SPAD with an added polysilicon gate. The extra gate terminal of the PGSPAD device mitigates premature edge breakdown and tunes the operating range, noise performance, efficacy. The proposed PGSPAD SiPM model accurately simulates the static, dynamic, and stochastic noise behavior of the SiPM detector and includes the effect of the additional gate terminal. Simulation results are validated with experimental measurements of the PGSPAD SiPM fabricated in 0.5 µm CMOS process. The proposed model is a helpful simulation tool for the PGSPAD SiPM designer to evaluate the effect of parameters, optimize the performance with additional gate terminal, and design the optimum readout electronics.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124983121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Highly Digital CCO-Based Asynchronous Analog-to-Time Converter 基于cco的高数字异步模拟-时间转换器
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885366
S. T. Chandrasekaran, A. Sanyal
{"title":"A Highly Digital CCO-Based Asynchronous Analog-to-Time Converter","authors":"S. T. Chandrasekaran, A. Sanyal","doi":"10.1109/MWSCAS.2019.8885366","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885366","url":null,"abstract":"This paper presents an asynchronous current controlled oscillator (CCO) based analog-to-time converter (ATC). The proposed ATC uses a ring oscillator as phase-domain integrator and quantizer. A negative feedback loop using current steering digital-to-analog converter (DAC) relaxes linearity requirement of the CCO. The ATC output is a multi-phase pulse-width modulated (PWM) signal which can be used with continuous-time digital signal processing systems. The proposed ATC is simulated in 65nm CMOS process an√d has a 59.2dB SNDR with an input-referred noise of 42.6nV/$sqrt {{text{Hz}}} $ over 500kHz bandwidth while consuming 11µW from 0.5V power supply.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115971502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and Analysis of Energy Efficient Reversible Logic based Full Adder 基于节能可逆逻辑的全加法器设计与分析
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884882
Jagadeesh Pujar, S. Raveendran, T. Panigrahi, H. VasanthaM., B. NithinKumarY.
{"title":"Design and Analysis of Energy Efficient Reversible Logic based Full Adder","authors":"Jagadeesh Pujar, S. Raveendran, T. Panigrahi, H. VasanthaM., B. NithinKumarY.","doi":"10.1109/MWSCAS.2019.8884882","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884882","url":null,"abstract":"Conventional digital systems incur information loss due to erasure of bits during logic operations resulting in remarkable amount of energy/power loss. Reversible computations nullify the information loss by retaining bits at the output. In arithmetic and logic computational structures, adders are the fundamental and performance determining component. In this paper an energy efficient low power reversible full adder is proposed, which is a combination of Feynman gates and a Fredkin gate. This paper proposes a comprehensive analysis and estimation of energy dissipation in reversible circuits. Cadence Virtuoso schematic editor is used to experimentally validate the models. The proposed adder effectively reduces ancilla inputs by 50%, garbage outputs by 50%, quantum cost by 33.33% and transistor count by 16.67% in comparison with full adder architectures present in literature.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115973588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
UHF RFID Localization Based on a Frequency-Stepped Continuous-Wave Approach 基于频率阶跃连续波方法的超高频RFID定位
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884894
Martin Scherhäufl, Markus Pichler-Scheder, C. Kastl, A. Stelzer
{"title":"UHF RFID Localization Based on a Frequency-Stepped Continuous-Wave Approach","authors":"Martin Scherhäufl, Markus Pichler-Scheder, C. Kastl, A. Stelzer","doi":"10.1109/MWSCAS.2019.8884894","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884894","url":null,"abstract":"This paper introduces a 2-D position measurement system for passive UHF RFID tags based on a frequency-stepped continuous-wave approach. The main application is the localization of objects tagged with RFID transponders. Using this method, no system calibration is required, and phase-ambiguity can be avoided by evaluating the backscattered transponder signals using multiple transmit frequencies of the interrogator signal. To prove the localization method, a local position measurement system demonstrator was used comprising conventional passive EPCglobal Class-1 Gen-2 UHF RFID tags, a commercial off-the-shelf RFID reader, eight transceiver frontends, baseband hardware, and signal processing. Measurements were carried out in an indoor office environment where a measurement zone of 5.0 m × 3.5 m was surrounded by drywalls, concrete floor and ceiling. The experimental results showed accurate localization with a root-mean-square error of 22.2 cm and a median absolute error of 17.0 cm.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122445909","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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