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2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)最新文献

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Transimpedance Amplifier Graphical Design Technique 跨阻放大器图形设计技术
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885311
T. Wey
{"title":"Transimpedance Amplifier Graphical Design Technique","authors":"T. Wey","doi":"10.1109/MWSCAS.2019.8885311","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885311","url":null,"abstract":"A transimpedance amplifier (TIA) graphical design technique including transimpedance gain, signal bandwidth, feedback loop stability, and noise performance is presented. The proposed graphical method allows for a more extensive design tradeoff analysis and is applicable to both compensated and decompensated opamps. The method is validated with Spice simulation and contrasted with published experimental results.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125099835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture : (Invited Special Session Paper) 基于多载波adc的鲁棒抖动串行链路接收机架构:(特邀专题会议论文)
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884927
Julian Camilo Gomez Diaz, Shiva Kiran, S. Palermo, S. Hoyos
{"title":"Jitter-Robust Multicarrier ADC-Based Serial Link Receiver Architecture : (Invited Special Session Paper)","authors":"Julian Camilo Gomez Diaz, Shiva Kiran, S. Palermo, S. Hoyos","doi":"10.1109/MWSCAS.2019.8884927","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884927","url":null,"abstract":"A multicarrier serial link receiver architecture allows for expanded symbol times to significantly relax the sampling clock jitter requirements that are currently imposing major limitations on achieving higher data rates. The proposed receiver utilizes a correlator-bank architecture with frequency channelization performed with down-conversion mixers, filters, and analog-to-digital converters (ADCs) for digitization. Continuous frequency-domain channel allocation is achieved with the utilization of digital inter-channel interference (ICI) cancellation. A detailed receiver noise analysis is presented and transient bit-error-rate simulations are utilized to evaluate the system performance with different modulation formats used on the multicarriers. Relative to a conventional four-level pulse amplitude modulation (PAM-4) system, the proposed receiver allows for a 3X improvement in jitter tolerance when operating at 64 Gb/s over a channel with 25 dB loss at 16 GHz.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128114949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 500-MS/s 8.4-ps Double-Edge Successive Approximation TDC in 65 nm CMOS 基于65nm CMOS的500 ms /s 8.4 ps双边缘连续逼近TDC
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885394
Rashed Siddiqui, F. Yuan, Yushi Zhou
{"title":"A 500-MS/s 8.4-ps Double-Edge Successive Approximation TDC in 65 nm CMOS","authors":"Rashed Siddiqui, F. Yuan, Yushi Zhou","doi":"10.1109/MWSCAS.2019.8885394","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885394","url":null,"abstract":"This paper presents an 8.4 ps 500 MS/s 4-bit successive approximation register time-to-digital converter (SAR-TDC). The TDC utilizes both the rising and falling edges of the cyclic signals defining the time input to perform time-to-digital conversion thereafter to low both the frequency of the cyclic signals and the power consumption of the system generating these signals by 50%. Pre-skewing is utilized to improve the resolution of the digital-to-time converter (DTC) subsequently the resolution of the TDC. Both the design and performance of the double-edge SAR TDC are compared with those of a corresponding single-edge SAR TDC. The TDCs was designed in a TSMC 65 nm CMOS technology and analyzed using Spectre from Cadence Design Systems with BSIM4 device models. Simulation results show at 500 MS/s, the TDC achieves a SFDR of 37.6, a SNDR of 25.5 dB, a resolution of 8.4 ps while consuming 0.86 mV.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133244785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
System Design Methodologies for Safety and Security of Future Wireless Technologies in Aviation 未来航空无线技术安全保障的系统设计方法
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885347
Pranay Bhardwaj, C. Purdy
{"title":"System Design Methodologies for Safety and Security of Future Wireless Technologies in Aviation","authors":"Pranay Bhardwaj, C. Purdy","doi":"10.1109/MWSCAS.2019.8885347","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885347","url":null,"abstract":"Automatic Dependent Surveillance-Broadcast (ADS-B) uses the Global Navigation Satellite System (GNSS) to pinpoint the aircraft’s location. Wireless technology is also connecting ground-based aviation facilities to each other via the internet protocol (IP). The use of ADS-B, GNSS, and wireless technologies raises many safety and security concerns. A number of potential solutions have been suggested. But as Kocher and others have pointed out, security is best built into a system design itself, rather than added later. While we cannot rebuild the ADS-B system, we can reconsider its security issues from scratch. In this paper, we use the Universal Modeling Language (UML) to specify security and safety threats to ADS-B. These UML diagrams will support thorough investigations of safety and security solutions, which will aid in making ADS-B more safe and secure. Our eventual goal is to develop an ADS-B formal specification for ADS-B model-checking.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134408045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Statistical Methodology to Relocate Resonance Frequencies of Software Defined Radio Antennas 软件无线电天线共振频率重新定位的统计方法
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884860
R. García-Dzul, C. H. Rodriguez, J. M. Trejo-Arellano, R. Parra-Michel
{"title":"Statistical Methodology to Relocate Resonance Frequencies of Software Defined Radio Antennas","authors":"R. García-Dzul, C. H. Rodriguez, J. M. Trejo-Arellano, R. Parra-Michel","doi":"10.1109/MWSCAS.2019.8884860","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884860","url":null,"abstract":"Software Defined Radio (SDR) allows integrating different wireless communication standards such as GSM, Bluetooth, and ZigBee, using the same hardware. In this scenario the antenna should be able to operate at different frequency bands of the coexisting standards to maintain the SDR advantages and flexibility. This difficult task can be tackled through the use of matching networks (MN) circuits, which allow changing the antenna’s resonance frequency, without requiring significant redesign of the SDR platform. However, is particularly difficult to find a set of good MN components values when it is required to operate at multiple frequency bands because it is necessary to relocate multiple frequency resonances. For this reason in this paper, a statistical methodology based on a Design of Experiments (DOE) is proposed to model the SDR system response for obtaining the design values of the MN components that effectively relocate the antenna frequency resonances. Also this proposal allows minimizing the number of circuit simulations and in consequence, the design time. The proposed methodology is applied to adjust the frequency resonances of a commercial antenna and SDR system and the obtained results are validated experimentally showing its effectivity.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115354268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Single Ended and Differential Passive RF Impedance Tuners for 2.4 GHz ISM Band Applications 用于2.4 GHz ISM波段应用的单端和差分无源射频阻抗调谐器
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884805
Ram Krishna, Abhishek Kumar, S. Aniruddhan
{"title":"Single Ended and Differential Passive RF Impedance Tuners for 2.4 GHz ISM Band Applications","authors":"Ram Krishna, Abhishek Kumar, S. Aniruddhan","doi":"10.1109/MWSCAS.2019.8884805","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884805","url":null,"abstract":"This paper presents the design of two electronically tunable passive RF impedance tuners operating between 2.4 GHz and 2.5 GHz. Theoretical analysis and simulation were performed on two pi matching networks in cascade which helped in increasing the load voltage standing wave ratio (VSWR) coverage. The linearity of the optimized single ended matching network was improved by converting it into a differential structure. Both the impedance tuners based on this theory were fabricated on a two layered FR4 PCB. The fabricated single ended tuner was tested for load impedance variation up to VSWR ≤ 9.5 wherein insertion loss stayed between 0.4 dB and 5.1 dB. The differential network was tested for load impedances up to VSWR ≤ 6 wherein an insertion loss between 0.6 dB and 6.1 dB was obtained. The measured IIP3 of the differential and single ended networks were 37.4 dBm and 34.2 dBm respectively.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117316613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Passive slew rate enhancement technique for Switched-Capacitor Circuits 开关电容电路的无源转换速率增强技术
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8885160
Manjunath Kareppagoudr, Emanuel Caceres, Yu-Wen Kuo, Jyotindra R. Shakya, Yanchao Wang, G. Temes
{"title":"Passive slew rate enhancement technique for Switched-Capacitor Circuits","authors":"Manjunath Kareppagoudr, Emanuel Caceres, Yu-Wen Kuo, Jyotindra R. Shakya, Yanchao Wang, G. Temes","doi":"10.1109/MWSCAS.2019.8885160","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8885160","url":null,"abstract":"A passive charge compensation technique is proposed for switched capacitor circuits which increases the slew rate of its amplifiers. Higher linearity can be achieved by adding a small amount of circuitry with low power consumption. The proposed technique is implemented in a single-bit discrete time second-order delta sigma modulator in 65-nm CMOS technology, where simulation results show an improvement of 12 dB SNDR. Alternatively, the same performance can be achieved with almost half of the power consumption with charge compensation circuit activated.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116180917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design of wireless smart chair system for people with cognitive deficiency 认知障碍者无线智能座椅系统的设计
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884971
V. Moshnyaga, Koji Hashimoto, Tomohiro Nogami, Kazuki Nojima
{"title":"Design of wireless smart chair system for people with cognitive deficiency","authors":"V. Moshnyaga, Koji Hashimoto, Tomohiro Nogami, Kazuki Nojima","doi":"10.1109/MWSCAS.2019.8884971","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884971","url":null,"abstract":"This article describes a sensor-based wireless system which monitors sitting postures of a person with cognitive impairment, assesses risks and alarms both the person and his caregiver if the risk of falling is high. Unlike existing smart chairs, the proposed system identifies postures that might cause a person to fall from chair by using minimal number of sensors and a simple posture classification algorithm. Experimental evaluation shows that the system operates in real-time, is robust yet inexpensive.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124755411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low-Cost Planar Inkjet-Printed Carbon Nanotube Field Effect Transistor for Sensor Applications 用于传感器的低成本平面喷墨印刷碳纳米管场效应晶体管
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884905
M. T. Islam, S. Gardner, R. Lu, M. Haider, J. I. D. Alexander, Y. Massoud
{"title":"A Low-Cost Planar Inkjet-Printed Carbon Nanotube Field Effect Transistor for Sensor Applications","authors":"M. T. Islam, S. Gardner, R. Lu, M. Haider, J. I. D. Alexander, Y. Massoud","doi":"10.1109/MWSCAS.2019.8884905","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884905","url":null,"abstract":"The semiconductor based transistor is the most essential building block of electronic components, computing applications, and sensors. However, the fabrication of this primary electronic element is complex and costly, especially when considering flexible electronics for bio-sensing applications. This paper proposes a planar inkjet-printed carbon nanotube field effect transistor (CNTFET) on paper and polyethylene terephthalate (PET) substrate to reduce the complexity of the system and lower the cost of conventional fabrication schemes. Single walled carbon nanotubes (SWNTs) are being used as semi-conductive ink for an inkjet-printer to facilitate and fabricate two types of transistors. Both thin (0.3 mm gate separation) and thick (0.5 mm gate separation) transistors with wide (4 mm) and narrow (2 mm) channel length have shown nearly linear characteristics of resistivity for a range of applied gate voltages. Our mathematical model based on experimental results shows great usefulness of the proposed inkjet-printed CNTFET for various electronic applications including but not limited to bio-sensors, healthcare measurements, and circuits.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124834775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Simple and Low-Cost Measurement Test Setup to Determine the RF, LO and IF Impedances for Designing GaN FET Resistive Mixer 简单和低成本的测量测试装置，以确定射频，本LO和中频阻抗设计GaN场效应管阻性混频器
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) Pub Date : 2019-08-01 DOI: 10.1109/MWSCAS.2019.8884891
C. Pérez‐Wences, J. R. Loo-Yau, P. Moreno
{"title":"Simple and Low-Cost Measurement Test Setup to Determine the RF, LO and IF Impedances for Designing GaN FET Resistive Mixer","authors":"C. Pérez‐Wences, J. R. Loo-Yau, P. Moreno","doi":"10.1109/MWSCAS.2019.8884891","DOIUrl":"https://doi.org/10.1109/MWSCAS.2019.8884891","url":null,"abstract":"This paper deals with a simple and low-cost test setup capable to measure the impedances needed for designing a FET resistive mixer. The proposed method uses an external signal generator along with one port S-parameters measurement and signal flow theory to determine the impedances at the RF, LO and IF frequencies. A packaged GaN FET is used to design a high linearity FET resistive mixer suitable to down-convert a 2.4 GHz LTE signal to a 0.1 GHz IF signal and the experimental results show a conversion loss of 6.9 dB and ACLR better than 45 dBc.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123680963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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