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2008 14th IEEE International On-Line Testing Symposium最新文献

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Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard 基于轮的加密算法的智能加固:在高级加密标准中的应用
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-07 DOI: 10.1109/IOLTS.2008.42
C. López-Ongil, Alejandro Jiménez-Horas, M. Portela-García, M. García-Valderas, E. S. Millán, L. Entrena
{"title":"Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard","authors":"C. López-Ongil, Alejandro Jiménez-Horas, M. Portela-García, M. García-Valderas, E. S. Millán, L. Entrena","doi":"10.1109/IOLTS.2008.42","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.42","url":null,"abstract":"Encryption algorithms could suffer fault injection attacks in order to obtain the secret key. In this paper, a specific protection for any round-based encryption algorithm is presented, analyzed and tested. It is providing a high degree of robustness together with a small penalty in the algorithm throughput when dealing with specific intentional attacks. Experimental results on advanced encryption standard are presented and discussed.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"305 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132949011","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Basic Architecture for Logic Self Repair 逻辑自修复的基本结构
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-07 DOI: 10.1109/IOLTS.2008.17
T. Koal, H. Vierhaus
{"title":"Basic Architecture for Logic Self Repair","authors":"T. Koal, H. Vierhaus","doi":"10.1109/IOLTS.2008.17","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.17","url":null,"abstract":"Built-in self test (BIST) and built-in self repair (BISR) techniques have been developed for memory blocks in recent years. Such techniques are suited to enhance production yield, but also to facilitate long-term dependable circuits though self repair in the field of application. BISR for logic circuits has shown to be much more complex, for which only a few approaches have been published so far. However, the roadmap of semiconductor industries sees a requirement of such technology by about 2012. This paper introduces a basic BISR methodology for logic circuits.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"277 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132761561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Physical Demonstration of Polymorphic Self-Checking Circuits 多态自检电路的物理演示
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-07 DOI: 10.1109/IOLTS.2008.23
R. Ruzicka, L. Sekanina, R. Prokop
{"title":"Physical Demonstration of Polymorphic Self-Checking Circuits","authors":"R. Ruzicka, L. Sekanina, R. Prokop","doi":"10.1109/IOLTS.2008.23","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.23","url":null,"abstract":"Polymorphic gates can be considered as a new reconfigurable technology capable of integrating logic functions with sensing in a single compact structure. Polymorphic gates whose logic function can be controlled by the level of the power supply voltage (Vdd) represent a special class of polymorphic gates. A new polymorphic NAND/NOR gate controlled by Vdd is presented. This gate was fabricated and utilized in a self-checking polymorphic adder. This paper presents an experimental evaluation of this novel implementation.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132006376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 45
A New Radiation Hardened by Design Latch for Ultra-Deep-Sub-Micron Technologies 一种新型的超深亚微米辐射强化设计锁存器
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-07 DOI: 10.1109/IOLTS.2008.9
Zhengfeng Huang, Huaguo Liang
{"title":"A New Radiation Hardened by Design Latch for Ultra-Deep-Sub-Micron Technologies","authors":"Zhengfeng Huang, Huaguo Liang","doi":"10.1109/IOLTS.2008.9","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.9","url":null,"abstract":"Soft errors induced by cosmic radiation have become an urgent issue for ultra-deep-sub-micron (UDSM) technologies. In this paper, we propose a new radiation hardened by design latch (RHBDL). RHBDL can improve robustness by masking the soft errors induced by SEU and SET. We evaluate the propagation delay, power dissipation and power delay product of RHBDL using SPICE simulations. Compared with existing reported solutions such as TMR-latch, RHBDL is less SEU-sensitive, more area efficient, delay and power efficient.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"23 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120975564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection 基于时间分辨激光故障注入的sram FPGA动态测试
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-07 DOI: 10.1109/IOLTS.2008.39
V. Pouget, A. Douin, G. Foucard, P. Peronnard, D. Lewis, P. Fouillat, R. Velazco
{"title":"Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection","authors":"V. Pouget, A. Douin, G. Foucard, P. Peronnard, D. Lewis, P. Fouillat, R. Velazco","doi":"10.1109/IOLTS.2008.39","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.39","url":null,"abstract":"This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125362296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Modeling and Simulation of Circuit Aging in Scaled CMOS Design CMOS设计中电路老化的建模与仿真
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-07 DOI: 10.1109/IOLTS.2008.65
Yung-Hua Kao
{"title":"Modeling and Simulation of Circuit Aging in Scaled CMOS Design","authors":"Yung-Hua Kao","doi":"10.1109/IOLTS.2008.65","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.65","url":null,"abstract":"The document was not made available for publication as part of the conference proceedings.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116697088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Special Session 3 – Panel: SER in Automotive: what is the impact of the AEC Q100-G spec? 特别会议3 -小组讨论:汽车领域的SER: AEC Q100-G规范的影响是什么?
2008 14th IEEE International On-Line Testing Symposium Pub Date : 2008-07-01 DOI: 10.1109/IOLTS.2008.68
T. Heijmen
{"title":"Special Session 3 – Panel: SER in Automotive: what is the impact of the AEC Q100-G spec?","authors":"T. Heijmen","doi":"10.1109/IOLTS.2008.68","DOIUrl":"https://doi.org/10.1109/IOLTS.2008.68","url":null,"abstract":"Summary form only given, as follows. A record of the panel discussion was not made available for publication as part of the conference proceedings. In May 2007 the Automotive Electronics Council (AEC) published the AEC-Q100 Revision-G document, which specifies the requirements for the stress qualification of integrated circuits (ICs). Different from previous revisions of this document, Q100-G includes requirements on soft-error rate (SER) qualification. This affects component and IC manufacturers that are involved in the automotive industry. Indirectly, it also affects other companies, research institutes and universities. Because of this, the SER requirements from the AEC Q100-G document have caused many discussions at different levels. In this panel discussion the following questions will be addressed: (1) How important are the SER requirements in AEC Q100-G? (2) How should these requirements be implemented? (3) How are the requirements related to other specs, e.g., to IEC 61508? (4) What are the gaps in knowledge and the needs for further research?","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127152072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Test Technology Educational Program (TTEP) 2008 Full-Day Tutorial 测试技术教育计划(TTEP) 2008全日教程
2008 14th IEEE International On-Line Testing Symposium Pub Date : 1900-01-01 DOI: 10.1109/iolts.2008.63
-. Subhasishmitra
{"title":"Test Technology Educational Program (TTEP) 2008 Full-Day Tutorial","authors":"-. Subhasishmitra","doi":"10.1109/iolts.2008.63","DOIUrl":"https://doi.org/10.1109/iolts.2008.63","url":null,"abstract":"","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122804330","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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