Basic Architecture for Logic Self Repair

Abstract

Built-in self test (BIST) and built-in self repair (BISR) techniques have been developed for memory blocks in recent years. Such techniques are suited to enhance production yield, but also to facilitate long-term dependable circuits though self repair in the field of application. BISR for logic circuits has shown to be much more complex, for which only a few approaches have been published so far. However, the roadmap of semiconductor industries sees a requirement of such technology by about 2012. This paper introduces a basic BISR methodology for logic circuits.