{"title":"逻辑自修复的基本结构","authors":"T. Koal, H. Vierhaus","doi":"10.1109/IOLTS.2008.17","DOIUrl":null,"url":null,"abstract":"Built-in self test (BIST) and built-in self repair (BISR) techniques have been developed for memory blocks in recent years. Such techniques are suited to enhance production yield, but also to facilitate long-term dependable circuits though self repair in the field of application. BISR for logic circuits has shown to be much more complex, for which only a few approaches have been published so far. However, the roadmap of semiconductor industries sees a requirement of such technology by about 2012. This paper introduces a basic BISR methodology for logic circuits.","PeriodicalId":261786,"journal":{"name":"2008 14th IEEE International On-Line Testing Symposium","volume":"277 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Basic Architecture for Logic Self Repair\",\"authors\":\"T. Koal, H. Vierhaus\",\"doi\":\"10.1109/IOLTS.2008.17\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Built-in self test (BIST) and built-in self repair (BISR) techniques have been developed for memory blocks in recent years. Such techniques are suited to enhance production yield, but also to facilitate long-term dependable circuits though self repair in the field of application. BISR for logic circuits has shown to be much more complex, for which only a few approaches have been published so far. However, the roadmap of semiconductor industries sees a requirement of such technology by about 2012. This paper introduces a basic BISR methodology for logic circuits.\",\"PeriodicalId\":261786,\"journal\":{\"name\":\"2008 14th IEEE International On-Line Testing Symposium\",\"volume\":\"277 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 14th IEEE International On-Line Testing Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IOLTS.2008.17\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 14th IEEE International On-Line Testing Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2008.17","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Built-in self test (BIST) and built-in self repair (BISR) techniques have been developed for memory blocks in recent years. Such techniques are suited to enhance production yield, but also to facilitate long-term dependable circuits though self repair in the field of application. BISR for logic circuits has shown to be much more complex, for which only a few approaches have been published so far. However, the roadmap of semiconductor industries sees a requirement of such technology by about 2012. This paper introduces a basic BISR methodology for logic circuits.