2009 Proceedings of ESSCIRC最新文献

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A 60GHz 65nm CMOS RMS power detector for antenna impedance mismatch detection 用于天线阻抗失配检测的60GHz 65nm CMOS RMS功率检测器
2009 Proceedings of ESSCIRC Pub Date : 2009-11-10 DOI: 10.1109/ESSCIRC.2009.5326027
J. Gorisse, A. Cathelin, A. Kaiser, E. Kerhervé
{"title":"A 60GHz 65nm CMOS RMS power detector for antenna impedance mismatch detection","authors":"J. Gorisse, A. Cathelin, A. Kaiser, E. Kerhervé","doi":"10.1109/ESSCIRC.2009.5326027","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5326027","url":null,"abstract":"This paper presents a 60GHz 65nm CMOS RMS power detector to be used in a Power Amplifier regulation loop. The presented test-chip integrates also a differential capacitive coupler sensing the RF voltage on a differential transmission line. The circuit shows 25dB of linear detection range at 60GHz, well enough to cover a VSWR of up to 7∶1 caused by antenna impedance mismatch while still having 10dB margin for output power regulation. The detector consumes only 50µA from a 1.2V power supply and occupies an active area of 80×80µm2.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125680882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGA 647 MHz, 0.642pJ/块/周期65nm自同步FPGA
2009 Proceedings of ESSCIRC Pub Date : 2009-11-10 DOI: 10.1109/ESSCIRC.2009.5326010
B. Devlin, MyeongGyu Jeong, T. Nakura, M. Ikeda, K. Asada
{"title":"647 MHz, 0.642pJ/block/cycle 65nm self synchronous FPGA","authors":"B. Devlin, MyeongGyu Jeong, T. Nakura, M. Ikeda, K. Asada","doi":"10.1109/ESSCIRC.2009.5326010","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5326010","url":null,"abstract":"We propose a self synchronous field programmable gate array (SSFPGA) with dual-pipeline (DP) architecture to eliminate pre-charge time for dynamic logic. A self synchronous LUT (SSLUT) consists of a three input tree-type structure with 8 bit SRAM for programming. A self synchronous switch box (SSSB) consists of both pass transistors and buffers. One common block with one SSLUT and one SSSB occupies 2.2λ2 area and the prototype SSFPGA with 34x30 (1020) blocks is designed and fabricated using 65nm CMOS. Measured results show 647MHz operation for a chain of 32 AND gates at 1.2V and 430MHz operation for a 3 bit ripple carry adder. Simulation results show 0.642pJ/block/cycle operation at 647MHz, 1.2V.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125071193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A 1.0 mW, 71 dB SNDR, −1.8 dBFS input swing, fourth-order ΣΔ interface circuit for MEMS microphones 用于MEMS麦克风的1.0 mW, 71 dB SNDR,−1.8 dBFS输入摆幅,四阶ΣΔ接口电路
2009 Proceedings of ESSCIRC Pub Date : 2009-11-10 DOI: 10.1109/ESSCIRC.2009.5325950
Luca Picolli, M. Grassi, Luca Rosson, P. Malcovati, A. Fornasari
{"title":"A 1.0 mW, 71 dB SNDR, −1.8 dBFS input swing, fourth-order ΣΔ interface circuit for MEMS microphones","authors":"Luca Picolli, M. Grassi, Luca Rosson, P. Malcovati, A. Fornasari","doi":"10.1109/ESSCIRC.2009.5325950","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325950","url":null,"abstract":"In this paper a large input swing integrated interface circuit for MEMS microphones is presented. It consists of an high impedance input buffer followed by a multi-bit (12-levels) analog second order ΣΔ modulator and a fully-digital single-bit fourth-order ΣΔ modulator. The circuit, supplied with 3.3V, exhibits a current consumption of 215 µA for the analog part and 95 µA for the digital part. The measured signal-to-noise and distortion ratio (SNDR) is 71 dB, with an input signal amplitude as large as −1.8 dB with respect to full-scale, obtained thanks to the use of a feed-forward technique, which relaxes the voltage swing requirements of the operational amplifiers. The test chip fabricated in a 0.35 µm CMOS occupies an area of 3 mm2 including pads.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126668745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
An integrated Shunt-LDO regulator for serial powered systems 用于串行供电系统的集成分流ldo稳压器
2009 Proceedings of ESSCIRC Pub Date : 2009-11-10 DOI: 10.1109/ESSCIRC.2009.5325974
M. Karagounis, D. Arutinov, M. Barbero, F. Hügging, H. Krueger, N. Wermes
{"title":"An integrated Shunt-LDO regulator for serial powered systems","authors":"M. Karagounis, D. Arutinov, M. Barbero, F. Hügging, H. Krueger, N. Wermes","doi":"10.1109/ESSCIRC.2009.5325974","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325974","url":null,"abstract":"In this paper, a new type of regulator is proposed for integration in ASICs used in serially powered systems. In the serial powering scheme, modules are placed in series and fed by a constant current source to reduce the IR drop on the cables which increases powering efficiency. At the module level the needed supply voltages are generated redundantly out of the current supply by several parallel operating ASICs with integrated regulation circuitry. A Shunt-LDO regulator has been developed to allow robust and redundant regulator operation and the generation of different supply voltages by parallel placed devices. The Shunt-LDO regulator scheme combines the capability of Low Drop-Out regulators to generate a constant supply voltage with the feature of shunt regulators to assure a constant current flow through the device. The Shunt-LDO regulator has been developed for application in the framework of next generation hybrid pixel detectors used in high energy physics experiments. This circuit has been prototyped in a 130nm CMOS technology, capable of generating voltages in a range of 1.2-1.5V with a minimum drop out voltage of 200mV. The maximum shunt current is 500mA with a load regulation factor corresponding to an output impedance of 30mΩ.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"12 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113957651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 58
An oscilloscope array for high-impedance device characterization 一种用于高阻抗器件表征的示波器阵列
2009 Proceedings of ESSCIRC Pub Date : 2009-11-01 DOI: 10.1109/ESSCIRC.2009.5325935
Fred Chen, A. Chandrakasan, V. Stojanović
{"title":"An oscilloscope array for high-impedance device characterization","authors":"Fred Chen, A. Chandrakasan, V. Stojanović","doi":"10.1109/ESSCIRC.2009.5325935","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325935","url":null,"abstract":"An equivalent time oscilloscope array is implemented in a 90nm CMOS technology. A combination of adjustable termination, calibration circuitry and capacitance compensation enables driver bandwidths between 0.4 to 2GHz for termination impedances of 20Ω to 2kΩ for extraction of S-parameters and delay characteristics of high impedance devices such as carbon nanotubes (CNTs) and graphene. Measurement results show that the capacitance compensation technique enhances the bandwidth by 3X for impedances between 2kΩ and 20kΩ.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122744268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A 200 µA duty-cycled PLL for wireless sensor nodes 用于无线传感器节点的200µA占空环锁相环
2009 Proceedings of ESSCIRC Pub Date : 2009-09-14 DOI: 10.1109/ESSCIRC.2009.5325979
S. Drago, D. Leenaerts, B. Nauta, F. Sebastiano, K. Makinwa, L. Breems
{"title":"A 200 µA duty-cycled PLL for wireless sensor nodes","authors":"S. Drago, D. Leenaerts, B. Nauta, F. Sebastiano, K. Makinwa, L. Breems","doi":"10.1109/ESSCIRC.2009.5325979","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325979","url":null,"abstract":"A duty-cycled PLL operating in burst mode is presented. It is an essential building block of a moderately accurate low-power frequency synthesizer suitable for use in nodes for Wireless Sensor Networks. Once in lock, the PLL's frequency error is less than 0.1% (rms). Fabricated in a baseline 65 nm CMOS process, the PLL occupies 0.19X0.15 mm2 and draws 200 µA from a 1.3-V supply when generating a 1 GHz signal with a duty cycle of 10%.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115018576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
RFID, where are they? RFID,它们在哪里?
2009 Proceedings of ESSCIRC Pub Date : 2009-09-01 DOI: 10.1109/ESSCIRC.2009.5325928
W. Dehaene, G. Gielen, M. Steyaert, Hans Danneels, V. Desmedt, C. D. Roover, Z. Li, M. Verhelst, N. V. Helleputte, S. Radioma, C. Walravensa, L. Pleysier
{"title":"RFID, where are they?","authors":"W. Dehaene, G. Gielen, M. Steyaert, Hans Danneels, V. Desmedt, C. D. Roover, Z. Li, M. Verhelst, N. V. Helleputte, S. Radioma, C. Walravensa, L. Pleysier","doi":"10.1109/ESSCIRC.2009.5325928","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325928","url":null,"abstract":"This paper gives an overview of RFID technology. RFID systems are described in general and a few example cases are given. After that the paper mainly focuses on the hardware requirements for RFIDs. Also Real Time Locationing Systems (RTLS) are discussed. This gives the title of the paper a double meaning: ‘what is the state of the art in RFID’ but also what is the available technology to come to locationing capable RFID systems. The paper gives an overview of the design challenges of different RFID systems. Also possible circuit solutions and directions are addressed.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121959734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A 0.4-1.4V 24MHz fully integrated 33µW, 104ppm/V supply-independent oscillator for RFIDs 一个0.4-1.4V 24MHz完全集成33µW, 104ppm/V电源无关的rfid振荡器
2009 Proceedings of ESSCIRC Pub Date : 2009-09-01 DOI: 10.1109/ESSCIRC.2009.5325966
V. D. Smedt, W. Dehaene, G. Gielen
{"title":"A 0.4-1.4V 24MHz fully integrated 33µW, 104ppm/V supply-independent oscillator for RFIDs","authors":"V. D. Smedt, W. Dehaene, G. Gielen","doi":"10.1109/ESSCIRC.2009.5325966","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325966","url":null,"abstract":"In RFID-tags with pulse-based UWB communication, accurate supply-independent low-power oscillators are required. The 24 MHz oscillator presented was realized in a 130 nm CMOS technology. It has an ultra-low supply voltage dependency of 104 ppm/V over a voltage range of 1.4 V to 0.4 V. This was achieved by the use of two nested ultra-low-power voltage regulators and a novel circuit technique based on the attraction of two oscillator frequencies. The mean power consumption is 33 µW over the 1 V voltage span. No external biasing and no trimming or calibration was used.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122393955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Performance, reliability, radiation effects, and aging issues in microelectronics — from atomic-scale physics to engineering-level modeling 性能,可靠性,辐射效应,老化问题在微电子-从原子尺度物理到工程级建模
2009 Proceedings of ESSCIRC Pub Date : 2009-05-01 DOI: 10.1109/ESSCIRC.2009.5325931
S. Pantelides, L. Tsetseris, M. Beck, S. Rashkeev, G. Hadjisavvas, I. Batyrev, B. Tuttle, A. Marinopoulos, X. Zhou, D. Fleetwood, peixiong zhao
{"title":"Performance, reliability, radiation effects, and aging issues in microelectronics — from atomic-scale physics to engineering-level modeling","authors":"S. Pantelides, L. Tsetseris, M. Beck, S. Rashkeev, G. Hadjisavvas, I. Batyrev, B. Tuttle, A. Marinopoulos, X. Zhou, D. Fleetwood, peixiong zhao","doi":"10.1109/ESSCIRC.2009.5325931","DOIUrl":"https://doi.org/10.1109/ESSCIRC.2009.5325931","url":null,"abstract":"The development of engineering-level models requires adoption of physical mechanisms that underlie observed phenomena. This paper reviews several cases where parameter-free, atomic-scale, quantum mechanical calculations led to the identification of specific physical mechanisms for phenomena relating to performance, reliability, radiation effects, and aging issues in microelectronics. More specifically, we review recent calculations of electron mobilities that are based on atomic-scale models of the Si-SiO2 interface and elucidate the origin of strain-induced mobility enhancement. We then review extensive work that highlights the role of hydrogen as the primary agent of reliability phenomena such as Negative Bias Temperature Instability (NBTI) and radiation effects, such as Enhanced Low Dose Radiation Sensitivity (ELDRS) and dopant deactivation. Finally, we review atomic-scale simulations of recoils induced by energetic ions in Si and SiO2. The latter provide a natural explanation for single-event gate rupture (SEGR) in terms of defects with energy levels in the SiO2 band gap.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122557676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation 大规模SRAM阵列的快速稳定性分析及NBTI退化的影响
2009 Proceedings of ESSCIRC Pub Date : 1900-01-01 DOI: 10.1109/esscirc.2009.5325952
S. Drapatz, T. Fischer, K. Hofmann, E. Amirante, P. Huber, M. Ostermayr, G. Georgakos, D. Schmitt-Landsiedel
{"title":"Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation","authors":"S. Drapatz, T. Fischer, K. Hofmann, E. Amirante, P. Huber, M. Ostermayr, G. Georgakos, D. Schmitt-Landsiedel","doi":"10.1109/esscirc.2009.5325952","DOIUrl":"https://doi.org/10.1109/esscirc.2009.5325952","url":null,"abstract":"This paper presents Read Margin analysis for large SRAM arrays with a fast test method that even can be realized in dual-VDD product chips. Classical Static Noise Margin (SNM) is mostly suitable for single-cell simulation. Read Margin (RM) measurement allows analysis of large arrays and correlates to SNM, but requires a dedicated teststructure and long measurement time. The presented method analyzes the flipping of cells over varying supply voltage. The stability of large arrays can be characterized in read as well as in hold state depending on the state of the access transistors. Applying this method, the impact of Negative Bias Temperature Instability (NBTI) is demonstrated on both Read and Hold Margin in a 65 nm low power technology.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128556114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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