A 1.0 mW, 71 dB SNDR, −1.8 dBFS input swing, fourth-order ΣΔ interface circuit for MEMS microphones

Luca Picolli, M. Grassi, Luca Rosson, P. Malcovati, A. Fornasari
{"title":"A 1.0 mW, 71 dB SNDR, −1.8 dBFS input swing, fourth-order ΣΔ interface circuit for MEMS microphones","authors":"Luca Picolli, M. Grassi, Luca Rosson, P. Malcovati, A. Fornasari","doi":"10.1109/ESSCIRC.2009.5325950","DOIUrl":null,"url":null,"abstract":"In this paper a large input swing integrated interface circuit for MEMS microphones is presented. It consists of an high impedance input buffer followed by a multi-bit (12-levels) analog second order ΣΔ modulator and a fully-digital single-bit fourth-order ΣΔ modulator. The circuit, supplied with 3.3V, exhibits a current consumption of 215 µA for the analog part and 95 µA for the digital part. The measured signal-to-noise and distortion ratio (SNDR) is 71 dB, with an input signal amplitude as large as −1.8 dB with respect to full-scale, obtained thanks to the use of a feed-forward technique, which relaxes the voltage swing requirements of the operational amplifiers. The test chip fabricated in a 0.35 µm CMOS occupies an area of 3 mm2 including pads.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Proceedings of ESSCIRC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2009.5325950","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

Abstract

In this paper a large input swing integrated interface circuit for MEMS microphones is presented. It consists of an high impedance input buffer followed by a multi-bit (12-levels) analog second order ΣΔ modulator and a fully-digital single-bit fourth-order ΣΔ modulator. The circuit, supplied with 3.3V, exhibits a current consumption of 215 µA for the analog part and 95 µA for the digital part. The measured signal-to-noise and distortion ratio (SNDR) is 71 dB, with an input signal amplitude as large as −1.8 dB with respect to full-scale, obtained thanks to the use of a feed-forward technique, which relaxes the voltage swing requirements of the operational amplifiers. The test chip fabricated in a 0.35 µm CMOS occupies an area of 3 mm2 including pads.
用于MEMS麦克风的1.0 mW, 71 dB SNDR,−1.8 dBFS输入摆幅,四阶ΣΔ接口电路
介绍了一种用于MEMS传声器的大输入摆幅集成接口电路。它由一个高阻抗输入缓冲器、一个多比特(12级)模拟二阶ΣΔ调制器和一个全数字单比特四阶ΣΔ调制器组成。该电路供电3.3V,模拟部分的电流消耗为215µa,数字部分的电流消耗为95µa。测量的信噪比和失真比(SNDR)为71 dB,相对于满量程而言,输入信号幅度高达- 1.8 dB,这得益于使用了前馈技术,该技术放宽了运算放大器的电压摆幅要求。在0.35µm CMOS中制造的测试芯片占地面积为3mm2(包括焊盘)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信