2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers最新文献_第3页

Scheduling with soft constraints 带有软约束的调度

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687410

J. Cong, B. Liu, Zhiru Zhang

{"title":"Scheduling with soft constraints","authors":"J. Cong, B. Liu, Zhiru Zhang","doi":"10.1145/1687399.1687410","DOIUrl":"https://doi.org/10.1145/1687399.1687410","url":null,"abstract":"In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, area, power, etc., so that the resulting RTL design is favorable in these aspects. The mechanism is often flawed in practice because many such constraints are actually soft constraints which are not necessary, and the constraint system may become inconsistent when many hard constraints are added for different purposes. This paper describes a scheduler that distinguishes soft constraints from hard constraints when exploring the design space. We propose a special class of soft constraints called integer-difference soft constraints, which lead to a totally unimodular constraint matrix in an integer linear programming formulation. By exploiting the total unimodularity, the problem can be solved optimally and efficiently using a linear programming relaxation without expensive branch and bound procedures. We also show how the proposed method can be used to support a variety of design considerations. As an example application, we apply the method to the problem of low-power synthesis with operation gating. In a set of experiments on real-world designs, our method achieves an average of 33.9% reduction in total power; it outperforms a previous method by 17.1% on average and gives close-to-optimal solutions on several designs.","PeriodicalId":256358,"journal":{"name":"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124891582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 24

QLMOR: A new projection-based approach for nonlinear model order reduction 一种新的基于投影的非线性模型降阶方法

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687474

Chenjie Gu

{"title":"QLMOR: A new projection-based approach for nonlinear model order reduction","authors":"Chenjie Gu","doi":"10.1145/1687399.1687474","DOIUrl":"https://doi.org/10.1145/1687399.1687474","url":null,"abstract":"We present a new projection-based nonlinear model order reduction method, named QLMOR (MOR via quadratic-linear systems). QL-MOR employs two novel ideas: (1) we show that DAEs (differential-algebraic equations) with many commonly-encountered nonlinear kernels can be re-written equivalently into a special format, QL-DAEs (quadratic-linear differential algebraic equations, i.e., DAEs that are quadratic in their state variables and linear in their inputs); (2) we adapt the moment-matching reduction technique of NORM[1] to reduce these QLDAEs into QLDAEs of much smaller size. Because of the generality of the QLDAE form, QLMOR has significantly broader applicability than Taylor-expansion based methods [2, 3, 1]. Importantly, QLMOR, unlike NORM, totally avoids explicit moment calculations (AiB terms), hence it has improved numerical stability properties as well. Because the reduced model has only quadratic nonlinearities (i.e., no cubic and higher-order terms), its computational complexity is less than that of similar prior methods[2, 3, 1]. We also prove that QLMOR-reduced models preserve local passivity, and provide an upper bound on the size of the QLDAEs derived from a polynomial system. We compare QLMOR against prior methods [2, 3, 1] on a circuit and a biochemical reaction-like system, and demonstrate that QLMOR-reduced models retain accuracy over a significantly wider range of excitation than Taylor-expansion based methods [2, 3, 1]. Indeed, QLMOR is able to reduce systems that Taylor-expansion based methods fail to reduce due to passivity loss and impracti-cally high computational costs. QLMOR therefore demonstrates that Volterra-kernel based nonlinear MOR techniques can in fact have far broader applicability than previously suspected, possibly being competitive with trajectory-based methods (e.g., TPWL [4]) and nonlinear-projection based methods (e.g., maniMOR [5]).","PeriodicalId":256358,"journal":{"name":"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124965750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 29

A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies 一种稳健、节能的自旋扭矩传输RAM阵列规模化设计方法

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687489

S. Chatterjee, M. Rasquinha, S. Yalamanchili, S. Mukhopadhyay

引用次数: 10

A study of routability estimation and clustering in placement 布局中可达性估计与聚类的研究

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687468

Kalliopi Tsota, Cheng-Kok Koh, V. Balakrishnan

引用次数: 1

Pad assignment for die-stacking System-in-Package design 模堆系统封装设计的焊盘分配

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687445

Wai-Kei Mak, Yu-Chen Lin, C. Chu, Ting-Chi Wang

引用次数: 5

Power-switch routing for coarse-grain MTCMOS technologies 粗粒度 MTCMOS 技术的电源开关路由选择

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687408

Tsun-Ming Tseng, M. Chao, Chien-Pang Lu, C. H. Lo

引用次数: 17

Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography 双模光刻的定时产率感知颜色重分配和详细位置扰动

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687512

Mohit Gupta, Kwangok Jeong, A. Kahng

{"title":"Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography","authors":"Mohit Gupta, Kwangok Jeong, A. Kahng","doi":"10.1145/1687399.1687512","DOIUrl":"https://doi.org/10.1145/1687399.1687512","url":null,"abstract":"Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32 nm and below technology nodes. However, DPL gives rise to two independent, un-correlated distributions of linewidth on a chip, resulting in a 'bimodal' linewidth distribution and an increase in performance variation. suggested that new physical design mechanisms could reduce harmful covariance terms that contribute to this performance variation. In this paper, we propose new bimodal-aware timing analysis and optimization methods to improve timing yield of standard-cell based designs that are manufactured using DPL. Our first contribution is a DPL-aware approach to timing modeling, based on detailed analysis of cell layouts. Our second contribution is an ILP-based maximization of 'alternate' mask coloring of instances in timing-critical paths, to minimize harmful covariance and performance variation. Third, we propose a dynamic programming-based detailed placement algorithm that solves mask coloring conflicts and can be used to ensure ¿double patterning correctness¿ after placement or even after detailed routing, while minimizing the displacement of timing-critical cells with manageable ECO impact. With a 45 nm library and open-source design testcases, our timing-aware recoloring and placement optimizations together achieve up to 232 ps (resp. 36.22 ns) reduction in worst (resp. total) negative slack, and 78% (resp. 65%) reduction in worst (resp. total) negative slack variation.","PeriodicalId":256358,"journal":{"name":"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130673689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

An electrical-level superposed-edge approach to statistical serial link simulation 统计串行链路仿真的电学级叠加边缘方法

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687533

M. Tsuk, D. Dvorscak, Chin Siong Ong, Jacob K. White

引用次数: 9

Maximizing performance of thermally constrained multi-core processors by dynamic voltage and frequency control 通过动态电压和频率控制最大化热约束多核处理器的性能

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687458

Vinay Hanumaiah, S. Vrudhula, Karam S. Chatha

引用次数: 47

The synthesis of combinational logic to generate probabilities 生成概率的组合逻辑的综合

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers Pub Date : 2009-11-02 DOI: 10.1145/1687399.1687470

Weikang Qian, Marc D. Riedel, K. Bazargan, D. Lilja

{"title":"The synthesis of combinational logic to generate probabilities","authors":"Weikang Qian, Marc D. Riedel, K. Bazargan, D. Lilja","doi":"10.1145/1687399.1687470","DOIUrl":"https://doi.org/10.1145/1687399.1687470","url":null,"abstract":"As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nano-scale characteristics as an impediment, technologies such as PCMOS exploit them as a source of randomness. The technology generates random numbers that are used in probabilistic algorithms. With the PCMOS approach, different voltage levels are used to generate different probability values. If many different probability values are required, this approach becomes prohibitively expensive. In this work, we demonstrate a novel technique for synthesizing logic that generates new probabilities from a given set of probabilities. Three different scenarios are considered in terms of whether the given probabilities can be duplicated and whether there is freedom to choose them. In the case that the given probabilities cannot be duplicated and are predetermined, we provide a solution that is FPGA-mappable. In the case that the given probabilities cannot be duplicated but can be freely chosen, we provide an optimal choice. In the case that the given probabilities can be duplicated and can be freely chosen, we demonstrate how to generate arbitrary decimal probabilities from small sets — a single probability or a pair of probabilities — through combinational logic.","PeriodicalId":256358,"journal":{"name":"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121272898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 42