模堆系统封装设计的焊盘分配

Wai-Kei Mak, Yu-Chen Lin, C. Chu, Ting-Chi Wang
{"title":"模堆系统封装设计的焊盘分配","authors":"Wai-Kei Mak, Yu-Chen Lin, C. Chu, Ting-Chi Wang","doi":"10.1145/1687399.1687445","DOIUrl":null,"url":null,"abstract":"Wire bonding is the most popular method to connect signals between dies in System-in-Package (SiP) design nowadays. Pad assignment, which assigns inter-die signals to die pads so as to facilitate wire bonding, is an important physical design problem for SiP design because the quality of a pad assignment solution affects both the cost and performance of a SiP design. In this paper, we study a pad assignment problem, which prohibits the generation of illegal crossings and aims to minimize the total signal wirelength, for die-stacking SiP design. We first consider a variety of special cases and present a minimum-cost maximum-flow based approach to optimally solve them in polynomial time. We then describe an approach, which uses a modified left edge algorithm and an integer linear programming technique, to solve the general case. Encouraging experimental results are shown to support our approaches. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids General Terms Algorithms, Experimentation","PeriodicalId":256358,"journal":{"name":"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Pad assignment for die-stacking System-in-Package design\",\"authors\":\"Wai-Kei Mak, Yu-Chen Lin, C. Chu, Ting-Chi Wang\",\"doi\":\"10.1145/1687399.1687445\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Wire bonding is the most popular method to connect signals between dies in System-in-Package (SiP) design nowadays. Pad assignment, which assigns inter-die signals to die pads so as to facilitate wire bonding, is an important physical design problem for SiP design because the quality of a pad assignment solution affects both the cost and performance of a SiP design. In this paper, we study a pad assignment problem, which prohibits the generation of illegal crossings and aims to minimize the total signal wirelength, for die-stacking SiP design. We first consider a variety of special cases and present a minimum-cost maximum-flow based approach to optimally solve them in polynomial time. We then describe an approach, which uses a modified left edge algorithm and an integer linear programming technique, to solve the general case. Encouraging experimental results are shown to support our approaches. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids General Terms Algorithms, Experimentation\",\"PeriodicalId\":256358,\"journal\":{\"name\":\"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1687399.1687445\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1687399.1687445","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

线键合是目前系统级封装(SiP)设计中最常用的芯片间信号连接方法。焊盘分配是指将模间信号分配到模盘上,以便进行导线键合,这是SiP设计中一个重要的物理设计问题,因为焊盘分配解决方案的质量会影响SiP设计的成本和性能。在本文中,我们研究了一种用于模堆叠SiP设计的发射台分配问题,该问题旨在防止非法交叉的产生,并以最小化总信号长度为目标。我们首先考虑了各种特殊情况,并提出了一种基于最小代价最大流量的方法来在多项式时间内最优地解决它们。然后,我们描述了一种使用改进的左边缘算法和整数线性规划技术来解决一般情况的方法。令人鼓舞的实验结果显示支持我们的方法。B.7.2[集成电路]:设计辅助工具、通用术语、算法、实验
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Pad assignment for die-stacking System-in-Package design
Wire bonding is the most popular method to connect signals between dies in System-in-Package (SiP) design nowadays. Pad assignment, which assigns inter-die signals to die pads so as to facilitate wire bonding, is an important physical design problem for SiP design because the quality of a pad assignment solution affects both the cost and performance of a SiP design. In this paper, we study a pad assignment problem, which prohibits the generation of illegal crossings and aims to minimize the total signal wirelength, for die-stacking SiP design. We first consider a variety of special cases and present a minimum-cost maximum-flow based approach to optimally solve them in polynomial time. We then describe an approach, which uses a modified left edge algorithm and an integer linear programming technique, to solve the general case. Encouraging experimental results are shown to support our approaches. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids General Terms Algorithms, Experimentation
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CiteScore
4.60
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