Daiki Hasegawa, Yuto Takeshita, K. Sano, Masamitsu Tanaka, A. Fujimaki, T. Yamashita
{"title":"Magnetic Josephson Junctions on Nb Four-layer Structure for Half Flux Quantum Circuits","authors":"Daiki Hasegawa, Yuto Takeshita, K. Sano, Masamitsu Tanaka, A. Fujimaki, T. Yamashita","doi":"10.1109/ISEC46533.2019.8990908","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990908","url":null,"abstract":"We successfully fabricated magnetic Josephson junctions integrated on a Nb four-layer superconducting structure for demonstrating half flux quantum (HFQ) circuits. In the developed process, we adopted a $0-0-pi$ SQUID instead of the $0-pi$ SQUID as the basic element of the HFQ circuits. In this work, we characterized the Nb/PdNi/Nb magnetic Josephson junctions on the Nb four-layer structures fabricated by two different processes. We measured the I-V characteristics of junctions in liquid helium at 4.2 K. The results showed that the fabricated junctions had properties comparable to conventional ones on Si wafers.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123562559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Using the Characteristics of Pulse Logic","authors":"Nobutaka Kito, K. Takagi, N. Takagi","doi":"10.1109/ISEC46533.2019.8990930","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990930","url":null,"abstract":"Conversion method of netlists consisting of conventional logic gates to RSFQ circuits is proposed. It treats netlists for CMOS circuits as the design entry, and converts them considering reduction of the number of clocked gates. It utilizes two characteristics of pulse logic for the reduction. One is utilizing confluence of pulses to realize logic-OR. The other is utilizing a small resettable DFF as an NIMPLY gate by tuning the order of pulse arrival. To minimize the number of clocked gates with minimum replacements of gates, the selection problem of gates for replacements utilizing those characteristics and assignment of logic level to each gate are formulated as an instance of integer linear programming.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125949905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Quantum Interference and Entanglement Effects in Hybrid Three-Terminal Splitters","authors":"M. Belogolovskii, E. Zhitlukhina, P. Seidel","doi":"10.1109/ISEC46533.2019.8990920","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990920","url":null,"abstract":"Coherent charge and spin transport of entangled electron waves across a three-terminal setup formed by a charge emitter and two drain wires with a superconducting inset in one of them and a perfect absorber or a spin filter in the other is theoretically discussed. We show that self-controlled charge and spin currents across the device can be realized by employing highly nonlinear dispersion relation in the near-gap energy range of a superconductor.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130453476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Holdengreber, M. Mizrahi, S. Schacham, E. Farber
{"title":"Remote Location of Superconducting Josephson Junction in Planar Antennas for Improved THz Detection","authors":"E. Holdengreber, M. Mizrahi, S. Schacham, E. Farber","doi":"10.1109/ISEC46533.2019.8990943","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990943","url":null,"abstract":"Detection of THz radiation can be significantly simplified using a detection system based on Superconducting Josephson junctions. Rather than operating extremely sophisticated conventional electronic equipment, the intensity and frequency can be derived from the Shapiro current steps. However, the detection efficiency is extremely sensitive to impedance mismatch between the antenna and the junction. In our proposed configuration, we displace the junction from the antenna center and placed it between the ends of two matching strips. Extensive simulations of this structure, based on theoretical analysis, show that with proper optimization of strip dimensions, high impedance matching can be obtained for the frequency range of around 265 GHz.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121064475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sagnik Nath, Kurt M. English, Alexander Derrickson, J. McDonald, Andrew Haslam
{"title":"An Automated Place and Route Methodology for Asynchronous SFQ Circuit Design","authors":"Sagnik Nath, Kurt M. English, Alexander Derrickson, J. McDonald, Andrew Haslam","doi":"10.1109/ISEC46533.2019.8990961","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990961","url":null,"abstract":"The present work proposes an Automated Place and Route Methodology for asynchronous SFQ circuits using PTL lines and a commercial EDA tool, Cadence's Innovus. At the cell level, dual rail SFQ Asynchronous standard cells were developed for the MIT Lincoln Labs SFQ5ee Process to be implemented in the Place and Route methodology. Python Scripts were written that could convert single rail netlists, obtained through the synthesis tool Design Vision from Synopsys, into dual rail asynchronous cells. Automatic Place and Route of Verilog based designs using these standard cells produced layouts that passed checks for Layout vs Schematic (LVS) and Design Rule Check (DRC). Then, the transmission line lengths are back annotated from the placed and routed design into analog simulation to simulate propagation delay.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115074074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"AQFPTX: Adiabatic Quantum-Flux-Parametron Timing eXtraction Tool","authors":"C. Ayala, O. Chen, N. Yoshikawa","doi":"10.1109/ISEC46533.2019.8990901","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990901","url":null,"abstract":"The IARPA SuperTools program calls upon the need to development an electronic design automation (EDA) environment for superconductor electronics capable of supporting both dc-biased and ac-biased superconductor logic families. The AQFP logic family is an ac-biased logic family that differs substantially from canonical SFQ logic in how circuits are synchronized. Thus, it is necessary to develop new timing extraction methodologies to characterize AQFP logic cells. To this end, we developed a new timing extraction tool called AQFPTX (Adiabatic Quantum-Flux-Parametron Timing eXtraction). The tool uses a standardized test harness to characterize cells. Characterization is performed by sweeping the clock skew amount using an analog simulation engine. The timing information is automatically extracted from the analog waveforms and tabulated in a standard delay format (SDF) file which can be used by the EDA environment to perform timing closure of VLSI AQFP circuits.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122709188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Müller, V. Morosh, Th. Weimann, Oliver Kieler, Javier Sesé, M. Martínez-Pérez, J. Lin, J. Linek, M. Karrer, F. Limberger, L. Koch, E. Goldobin, R. Kleiner, D. Koelle
{"title":"YBa2Cu3O7 and Nb NanoSQUIDs for the Investigation of Magnetization Reversal of Individual Magnetic Nanoparticles","authors":"B. Müller, V. Morosh, Th. Weimann, Oliver Kieler, Javier Sesé, M. Martínez-Pérez, J. Lin, J. Linek, M. Karrer, F. Limberger, L. Koch, E. Goldobin, R. Kleiner, D. Koelle","doi":"10.1109/ISEC46533.2019.8990906","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990906","url":null,"abstract":"We report on the fabrication, performance and application of sensitive YBa2Cu3O7 (YBCO) and Nb nanoSQUIDs to magnetization reversal measurements of individual magnetic nanoparticles. The YBCO SQUIDs are based on grain boundary Josephson junctions and are patterned in a single layer of epitaxially grown YBCO films by Ga focused ion beam milling. The Nb SQUIDs contain sandwich-type Josephson junctions with normal conducting HfTi barriers; they are fabricated with a multilayer technology that includes patterning by e-beam lithography and a combination of milling techniques and chemical-mechanical polishing. Due to the small inductance of the SQUID loops, ultralow white flux noise at 4.2 K can be achieved, which yields spin sensitivities of down to a few Bohr magnetons per unit bandwidth for a magnetic nanoparticle placed at 10 nm distance to the SQUID loop.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117083302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pei-Yao Qu, Guangming Tang, Xiao-Chun Ye, D. Fan, Zhimin Zhang, Ning-Hui Sun
{"title":"Design of Datapath Circuits for a Bit-Parallel 8-bit RSFQ Microprocessor","authors":"Pei-Yao Qu, Guangming Tang, Xiao-Chun Ye, D. Fan, Zhimin Zhang, Ning-Hui Sun","doi":"10.1109/ISEC46533.2019.8990911","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990911","url":null,"abstract":"Rapid single-flux-quantum (RSFQ) is expected to be the next generation integrated circuit technology because of its ultra-high-speed with ultra-low-power consumption. We propose datapath circuits for an 8-bit bit-parallel RSFQ microprocessor. The proposed datapath circuits process 8-bit data each clock cycle. Seven instructions are executed in the datapath, including ADD, ADDI, IN, OUT, LOADI, SRL and MOV. The datapath circuits consist of eight input ports, eight output ports, five multiplexers (MUXs), two 8-bit data registers and one 8-bit bit-parallel arithmetic logic unit (ALU). The datapath circuits contain 12 pipeline stages and 2993 JJs based on the Open Dataset of CONNECT Cell Library for AIST ADP2 without considering wiring cells. We perform digital simulation of the proposed datapath circuits. The simulation results show correct operation with the assumed frequency of 20 GHz.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115729804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Anthony T. Cortez, E. Cho, Hao Li, D. Cunnane, B. Karasik, S. Cybart
{"title":"High-Frequency Properties of Y-Ba-Cu-O Josephson Junctions Fabricated with Helium Ion Beam Irradiation","authors":"Anthony T. Cortez, E. Cho, Hao Li, D. Cunnane, B. Karasik, S. Cybart","doi":"10.1109/ISEC46533.2019.8990898","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990898","url":null,"abstract":"We have fabricated spiral THz antennas containing embedded high $mathrm{T}_{mathrm{C}}mathrm{YBa}_{2}mathrm{Cu}_{3}mathrm{O}_{7}$ (YBCO) focused helium ion beam Josephson junctions (JJ) for characterization of their high frequency characteristics. The values of the resistance and critical current of the junctions are controlled through the irradiation dose and geometry of the junction. We observe several orders of Shapiro steps in the current voltage characteristics of the device when irradiated with 0.6 THz and a single step when irradiated at 2.52 THz.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"362 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131590722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Experimental designs of ballistic reversible logic gates using fluxons","authors":"Liuqi Yu, W. Wustmann, K. Osborn","doi":"10.1109/ISEC46533.2019.8990914","DOIUrl":"https://doi.org/10.1109/ISEC46533.2019.8990914","url":null,"abstract":"Compared to irreversible gate operations, reversible digital logic gates can provide a fundamental advantage in energy efficiency. Here we discuss previously discovered 1-bit ballistic reversible logic gates and new experimental plans to measure it. The gates consist of long Josephson junctions (LJJs) connected by a circuit interface. The gate dynamics evanescently extends into the LJJs to realize the physically resonant gate operation. It differs from known adiabatic superconducting gates because it does not work in the adiabatic limit. Depending on the gate type, that is the Identity or NOT gate, the polarity of the outgoing fluxon should be preserved or inverted, respectively. The dynamics of the scattering process, originally discovered in full numerical simulation, is understood using collective coordinate analysis. We plan to experimentally study how well a fluxon can travel ballistically towards the interface, and scatter with the designed gate operation. Here we present gate and SQUID-sensing layout designs for a NOT gate. The LJJ circuit layout uses niobium trilayer short junctions with connecting wiring for inductors. Part of the design includes the shunting capacitors at the gate interface which is key for the resonant dynamics in the gates.","PeriodicalId":250606,"journal":{"name":"2019 IEEE International Superconductive Electronics Conference (ISEC)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128358047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}