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ESSCIRC '92: Eighteenth European Solid-State Circuits conference最新文献

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CMOS Current-mode Operational Amplifier CMOS电流模式运算放大器
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468207
T. Kaulberg
{"title":"CMOS Current-mode Operational Amplifier","authors":"T. Kaulberg","doi":"10.1109/ESSCIRC.1992.5468207","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468207","url":null,"abstract":"A fully differential-input differential-output current-mode operational amplifier (COA) is described. The amplifier utilizes three second generation current-conveyors (CCII) as the basic building blocks. It can be configured to provide either a constant gain-bandwidth product in a fully balanced current-mode feedback amplifier or a constant bandwidth in a transimpedance feedback amplifier. The amplifier is found to have a gain bandwidth product of 8 MHz, an offset current of 0.8 ¿A (signal-range ±700¿A) and a (theoretically) unlimited slew-rate. The amplifier is realized in a standard CMOS 2.4¿m process.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120925498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 120
Accuracy Optimization of Analog Fuzzy Circuitry in Network Analysis Environment 网络分析环境下模拟模糊电路的精度优化
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468196
J. Oehm, K. Schumacher
{"title":"Accuracy Optimization of Analog Fuzzy Circuitry in Network Analysis Environment","authors":"J. Oehm, K. Schumacher","doi":"10.1109/ESSCIRC.1992.5468196","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468196","url":null,"abstract":"In contrast to digital circuits the performance of analog integrated circuits and therewith of analog fuzzy components highly depends on local matching accuracy. Especially for scaled structures down to the submicrometer range the local statistical mismatch effects increase rapidly. As in network analysis programs like SPICE [1] local statistical mismatch effects are not represented within the implemented device modelling, in consequence no analysis options are available to compute their influence on electrical circuit characteristics in fabrication. Fast analysis methods have been developed and implemented [2] into SPICE and the compatible simulator BONSAI [3], using especially mismatch modelling for MOS transistors introduced in [4] and [5]. Simulation methods and simulated yield statistics in comparison to measurements of fabricated analog fuzzy applications are reported.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127354968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Extension of the Input Common-Mode Range Beyond the Supply Rails of Operational Amplifiers and Comparators 运算放大器和比较器电源轨以外输入共模范围的扩展
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468253
G. van der Horn, J. Huijsing
{"title":"Extension of the Input Common-Mode Range Beyond the Supply Rails of Operational Amplifiers and Comparators","authors":"G. van der Horn, J. Huijsing","doi":"10.1109/ESSCIRC.1992.5468253","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468253","url":null,"abstract":"When the input common-mode (CM-) voltage of an Operational Amplifier or Comparator exceeds the range of normal operation the (bipolar) input transistors saturate. This results in reversal of the signal polarity at the output, and in an increasing input bias current. These saturation effects cause very undesirable OpAmp behaviour. Satisfactory solutions for these problems are not found in existing input stage configurations. Novel circuit topologies for input stages with an extended CM-range are presented. The designed and realised input stages do not show the above-described adverse effects, and offer the advantage of an input CM-range extending far beyond the supply rails. The transconductance of these new input stages is constant over a full (extended) CM-range, and the input bias current is limited. A realisation of one proposed input stage configuration showed a CM-range that reached +14 Volt, at a supply voltage down to 1.3 Volt, while the input bias current was limited to 2.5 uA.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132669256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Challenges in Testing of Mixed Mode Analog/Digital ICs 混合模式模拟/数字集成电路测试中的挑战
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468469
Wojciech Maly
{"title":"Challenges in Testing of Mixed Mode Analog/Digital ICs","authors":"Wojciech Maly","doi":"10.1109/ESSCIRC.1992.5468469","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468469","url":null,"abstract":"Testing of digital and analog ICs has became an extremely complex and often expensive activity. Testing of mixed digital/analog ICs is even more complex because of an interaction between two different environments - digital and analog - generating new failure modes. This paper examines - from a testing standpoint basic characteristics of mixed digital/analog ICs. Out of the presented examination a possible new testing scenario, suitable for mixed ICs, is derived. It is argued that new mixed IC testing strategies must be build based on DFT techniques and that concepts successful in the digital domain must be expanded to cover entire mixed digital/analog testing arena.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114934638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2μm CMOS 5th Order Low-pass Continuous-Time Filter for Video-Frequency Applications 用于视频应用的2μm CMOS 5阶低通连续时间滤波器
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468434
B. Stefanelli, A. Kaiser
{"title":"A 2μm CMOS 5th Order Low-pass Continuous-Time Filter for Video-Frequency Applications","authors":"B. Stefanelli, A. Kaiser","doi":"10.1109/ESSCIRC.1992.5468434","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468434","url":null,"abstract":"A 5th order elliptic low-pass continuous-time filter based on triode transconductors for applications in the video frequency range is presented. Fabricated in a standard 2μm CMOS technology, the filter achieves a 7 MHz cut-off frequency using a simple parasitic pole compensation scheme. A new transconductor biasing strategy is also presented, which allows the tuning of the transconductance over a decade.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134305933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Signal- and Noise Performance of a PLL used in a TV-IF -Circuit 用于电视中频电路的锁相环的信噪性能
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468135
M. Rieger, S. Roth, S. Rudischhauser, A. Schatral
{"title":"Signal- and Noise Performance of a PLL used in a TV-IF -Circuit","authors":"M. Rieger, S. Roth, S. Rudischhauser, A. Schatral","doi":"10.1109/ESSCIRC.1992.5468135","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468135","url":null,"abstract":"In this paper we report about the signal and noise performance of a VCO and a PLL. An accurate method to calculate the phase noise is outlined. The characteristics of the PLL are calculated. The calculated values are compared to the measured results obtained with an IC realized in BICMOS technology.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122451808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Mixed Signal Circuits : Overview of a Flexible Design Methodology using BICMOS Processes 混合信号电路:使用BICMOS工艺的灵活设计方法概述
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468462
C. Caillon
{"title":"Mixed Signal Circuits : Overview of a Flexible Design Methodology using BICMOS Processes","authors":"C. Caillon","doi":"10.1109/ESSCIRC.1992.5468462","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468462","url":null,"abstract":"This paper describes a new design methodology for mixed signal circuits using BICMOS processes. An overview of BICMOS process requirements for mixed applications is presented as well as a new 0.7 um CMOS and 13 Ghz / NPN process. Some innovative library concepts, which offer a lot of flexibility, are shown in the third chapter. A mixture of classical library concepts and CAD tools are extensively used. Then, an overview of a front-end and a back-end design tool offering most of the functionality needed to develop mixed signal circuits is presented. Finally, some considerations on mixed signal circuit testing are discussed, and new tools introduced.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123923292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A High Frequency CMOS Power Buffer with Extended Linearity 一种扩展线性的高频CMOS电源缓冲器
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468259
G. Caiulo, F. Maloberti, G. Palmisano, S. Portaluri
{"title":"A High Frequency CMOS Power Buffer with Extended Linearity","authors":"G. Caiulo, F. Maloberti, G. Palmisano, S. Portaluri","doi":"10.1109/ESSCIRC.1992.5468259","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468259","url":null,"abstract":"A CMOS power buffer suitable for high frequency applications is discussed. The use of a high-speed push-pull output stage and a highly-linear common mode feedback allow good linearity to be maintained even with very high input frequencies. Indeed, Total Harmonic Distortions (THD) as good as ¿66 dB and ¿58 dB are achieved at 0.5 MHz and 1 MHz, respectively, with a load resistance of 75 ¿. Moreover, the circuit provides a dc gain of 62 dB and a gain-bandwidth product of 60 MHz. The integrated prototype, realized using a 1.2 ¿m CMOS process, occupies a silicon area of 280 mils2.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128988523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analog CMOS-Realization of Fuzzy Logic Membership Functions 模拟cmos -模糊逻辑隶属函数的实现
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468154
T. Kettner, C. Heite, K. Schumacher
{"title":"Analog CMOS-Realization of Fuzzy Logic Membership Functions","authors":"T. Kettner, C. Heite, K. Schumacher","doi":"10.1109/ESSCIRC.1992.5468154","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468154","url":null,"abstract":"A new network structure to realize any fuzzy membership function working in current-mode is presented. Only one reference current is required independent of the course or the number of the implemented functions. The networks are temperature insensitive and only a small chip area is needed. The design procedure is very simple and fast due to the regular circuit structure. Theoretical evaluations are validated by several membership functions fabricated in a 1.0 ¿m CMOS-technology.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115815928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Analog Electronic Neural Networks 模拟电子神经网络
ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI: 10.1109/ESSCIRC.1992.5468456
H. Graf
{"title":"Analog Electronic Neural Networks","authors":"H. Graf","doi":"10.1109/ESSCIRC.1992.5468456","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1992.5468456","url":null,"abstract":"The interest in analog circuit techniques for implementing neural nets is undiminished, as is indicated by a large number of recent designs, coming from universities as well as from industry. One group of circuits are networks containing the \"multiply-accumulate\" neurons with a large interconnectivity. The main motivation for using analog circuit techniques is the fact that the multiply-accumulate operation can be implemented compactly, if only a moderate precision of the computation is required. Other types of networks are more algorithm-specific, hard-wired for one function, for example Kohonen networks, or neuromorphic designs implementing functions found in the visual or the auditory system. Most neural nets are built with standard CMOS technology, except for a few designs in CCD technology. A few analog neural net chips are now commercially available, and more and more reports of applications are appearing. This is a significant step in the development of analog neural nets, as now their usefulness is being put to the test in \"real-world\" applications.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116016755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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