{"title":"Challenges in Testing of Mixed Mode Analog/Digital ICs","authors":"Wojciech Maly","doi":"10.1109/ESSCIRC.1992.5468469","DOIUrl":null,"url":null,"abstract":"Testing of digital and analog ICs has became an extremely complex and often expensive activity. Testing of mixed digital/analog ICs is even more complex because of an interaction between two different environments - digital and analog - generating new failure modes. This paper examines - from a testing standpoint basic characteristics of mixed digital/analog ICs. Out of the presented examination a possible new testing scenario, suitable for mixed ICs, is derived. It is argued that new mixed IC testing strategies must be build based on DFT techniques and that concepts successful in the digital domain must be expanded to cover entire mixed digital/analog testing arena.","PeriodicalId":242379,"journal":{"name":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '92: Eighteenth European Solid-State Circuits conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1992.5468469","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Testing of digital and analog ICs has became an extremely complex and often expensive activity. Testing of mixed digital/analog ICs is even more complex because of an interaction between two different environments - digital and analog - generating new failure modes. This paper examines - from a testing standpoint basic characteristics of mixed digital/analog ICs. Out of the presented examination a possible new testing scenario, suitable for mixed ICs, is derived. It is argued that new mixed IC testing strategies must be build based on DFT techniques and that concepts successful in the digital domain must be expanded to cover entire mixed digital/analog testing arena.