{"title":"A 5V temperature-regulated reference","authors":"D. Laude, J. Beason","doi":"10.1109/ISSCC.1980.1156125","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156125","url":null,"abstract":"A monolithic 5V reference for a 12b A/D converter, accurate to ±1LSB over a temperature range of -55 to 125°C will be reported. Typical temperature coefficient is 0.3ppm/° C and PSRR is 100dB.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121466219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Matsue, H. Yamamoto, K. Kobayashi, T. Wada, M. Tameda, T. Okuda, Y. Inagaki
{"title":"A 256 K dynamic RAM","authors":"S. Matsue, H. Yamamoto, K. Kobayashi, T. Wada, M. Tameda, T. Okuda, Y. Inagaki","doi":"10.1109/ISSCC.1980.1156048","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156048","url":null,"abstract":"IN A CONTINUING EFFORT to lower the cost, and increase the density, a 256K x l b single transistor cell RAM has been designed, and assembled in a standard 300mil16pin DIP. The RAM is organized to be compatible with existing 16pin 16K RAMS and 16pin 64K RAMS. The pin configuration and the photo are shown in Figure 1. The chip is arranged as a 256 rows x 1.024 columns matrix and is organized internally as two 128K RAMS. The location of important circuit blocks on the chip is shown in Figure 2. The memory cell layout is shown in Figure 3. The cell measures 5.7 x 12.5pm and has a storage capacitance of 0.035pF by decreasing the cell capacitor oxide thickness to 200A. To reduce the ratio of digit line to cell capacitance, the digit line is formed in the second polysilicon layer. The resulting capacitance ratio is 20: 1. To reduce dynamic noise on the digit line caused by the substrate current ransients, the digit lines arc sheltered by the first polysilicon ground plane.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116647469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A monolithic peak detector","authors":"P. Henneuse","doi":"10.1109/ISSCC.1980.1156046","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156046","url":null,"abstract":"A monolithic peak detector IC which combines a transconductance amplifier and a differential current switching technique with nominally zero charge injection will be described.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"55 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123078943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Foster, H. El-Sissi, V. Korsky, K. Siemens, R. Wallace, William Siu
{"title":"A monolithic NMOS filter and line balance chip","authors":"M. Foster, H. El-Sissi, V. Korsky, K. Siemens, R. Wallace, William Siu","doi":"10.1109/ISSCC.1980.1156016","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156016","url":null,"abstract":"A SINGLE CHIP FILTER, designed to replace passive LC and active RC filters in PCM telephony, has been presented earlier’. This paper will describe monolithic NMOS filter and line balance (FAB) chip intended for use in PCM D3/D4 quality line-circuit filtering applications. The FAB chip combines gain and fre uency trimmable transmit and receive switched-capacitor with a number of integrated line-circuit functions. These functions include external software controlled gain and derived from the loop detector circuit and is a function of the loop resistance.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"300 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123194782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Terui, T. Wada, M. Yoshino, H. Kadota, T. Komeda, T. Chikamura, S. Fujiwara, H. Tanaka, Y. Ota, Y. Fujiwara, K. Ogawa, O. Kitahiro, S. Horiuchi
{"title":"A solid state color image sensor using ZnSe-Zn1-xCdxTe heterojunction thin-film photoconductor","authors":"Y. Terui, T. Wada, M. Yoshino, H. Kadota, T. Komeda, T. Chikamura, S. Fujiwara, H. Tanaka, Y. Ota, Y. Fujiwara, K. Ogawa, O. Kitahiro, S. Horiuchi","doi":"10.1109/ISSCC.1980.1156082","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156082","url":null,"abstract":"A 413H X 506V BBD* image sensor structure using a ZnSe-Znl-,Cd,Te heterojunction thin-film photoconductor for color imaging applications will be described. The device, with its photoconductive-layer-on-solid-scanner (PLOSS), can extend the aperture of the photoconductor to the scanning circuit area to obtain the high blue sensitivity of the heterojunction diode. Low light level sensing of a color image is thus possible. Blooming suppression is also available. The unit cell of the sensor, which consists of a thin-film photoconductor, a read-gate FET and a bucket-brigade transfer gate FET is shown schematically in Figure 1. The heterojunction film which is composed of ZnSe-Znl-,Cd,Te multilayer is vacuum-deposited on these FETs. A transparent electrode of IT0 film is deposited on the Znl-xCdxTe layer for reverse biasing of the heterojunction diode. The metal electrodes for ZnSe layer make contact with the N+ diffused source area of the read-gate FET to read a photogenerated charge from the reverse-biased heterojunction diode into the transfer stage of BBD-shift register through with the color filter located on the sensor within lop gap. The color difference signals (R-G, Cy-G) werc derived directly from the device at line sequential via a color filter and then encoded into an NTSC signal. The device has an acceptable color image quality under a low light ‘scene illumination level of 500 I x (F:2.0) which is 50% of the saturation illumination. In this state the SN is 43dB. Highlight exposure for a 10% spot of the imaging area was up to 120 times as intense as the saturation exposure within 5% blooming for the saturation signal.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122572503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A floating low-power subscriber line interface","authors":"L. Freimanis, D. Smith","doi":"10.1109/ISSCC.1980.1156057","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156057","url":null,"abstract":"A subscriber line interface circuit, utilizing a floating power conversion technique to minimize size, energy consumption, circuit dissipation, and provide 1000V transient isolation for low-level analog or digital switching networks, will be covered.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"262 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133783663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Tanaka, M. Yamasawa, S. Kato, A. Itoh, M. Takahashi, M. Ohhata, A. Iwata, S. Hattori
{"title":"PCM coder and decoder ICs with switched capacitor filters","authors":"H. Tanaka, M. Yamasawa, S. Kato, A. Itoh, M. Takahashi, M. Ohhata, A. Iwata, S. Hattori","doi":"10.1109/ISSCC.1980.1156065","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156065","url":null,"abstract":"A two-chip per-channel companded CODEC with on-chip switched capacitor filters, implemented in the metal gate CMOS process, will be discussed. Typical power dissipation is 130mW in active mode and 15mW in standby.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131301465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The semiconductor industry challenges in the decade ahead","authors":"J. Bucy","doi":"10.1109/ISSCC.1980.1156116","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156116","url":null,"abstract":"The semiconductor industry has entered a period of great promise destined to be the most fruitful and rewarding in its history. This potential has been recognized by governments, major non-electric companies, communications and media organizations, with all exerting strong external forces on directions and strategies ....Concurrently, the rate of technology advancements continues unabated with major technology turnovers occurring every five to seven years. Each advance is more demanding, pressing for internal capabilities to design and manufacture devices and the need to meet critical requirements for interfacing with external users .... Do these forces present challenges that require new approaches and strategies by the semiconductor industry, or are they large-scale versions of similar forces that have been faced by industry in each of the major technology events of the past 25 years? ....These vital issues will be assessed.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133230662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A monolithic capacitive pressure sensor with pulse-period output","authors":"C. Sander, J. Knutti, J. Meindl","doi":"10.1109/ISSCC.1980.1156130","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156130","url":null,"abstract":"A batch-fabricated 2.8 × 3.4mm monolithic capacitive pressure sensor, replacing piezoresistive pressure transducers, employing on-chip (less than 10mm2) circuitry, with current drain of 20μA operating at 2.5-20V, will be reported.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124341593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A low power NMOS transmit/receive IC filter for PCM telephony","authors":"I. Young, D. Hildebrand, C. Johnson","doi":"10.1109/isscc.1980.1156047","DOIUrl":"https://doi.org/10.1109/isscc.1980.1156047","url":null,"abstract":"","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121287099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}