PCM coder and decoder ICs with switched capacitor filters

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1980.1156065

H. Tanaka, M. Yamasawa, S. Kato, A. Itoh, M. Takahashi, M. Ohhata, A. Iwata, S. Hattori

引用次数: 1

Abstract

A two-chip per-channel companded CODEC with on-chip switched capacitor filters, implemented in the metal gate CMOS process, will be discussed. Typical power dissipation is 130mW in active mode and 15mW in standby.

查看原文本刊更多论文

带开关电容滤波器的PCM编码器和解码器ic

将讨论在金属栅CMOS工艺中实现的带有片上开关电容滤波器的双片单通道压缩编解码器。典型功耗为主动模式下130mW，待机模式下15mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

自引率

0.00%

发文量