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2007 IEEE Workshop on Signal Propagation on Interconnects最新文献

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RLC crosstalk calculation with dissymmetrical attacks 不对称攻击下RLC串扰计算
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512257
J. Lorival, D. Deschacht
{"title":"RLC crosstalk calculation with dissymmetrical attacks","authors":"J. Lorival, D. Deschacht","doi":"10.1109/SPI.2007.4512257","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512257","url":null,"abstract":"The signal integrity of VLSI circuits is an emerging concern in high performance integrated circuits. A previous RLC crosstalk noise expression we have submitted, based on a RLC transmission line model associated with each propagation mode, could predict the noise amplitude of an RLC interconnect, yet only by making the assumption of a perfect symmetry between the two coupled lines and their respective attacks and loads. To be able to use this expression in VLSI circuits, where active and victim lines are attacked by buffers with different equivalent output resistances, this paper proposes to determine a corrective term depending on the line electrical parameters and on a dissymmetry factor between the equivalent resistances attacking the coupled lines.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132030836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Interconnect length impact investigation by measurements 互连长度影响的测量研究
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512203
Michael Sotman, Alexey Kostinsky, Genadiy Zobin, Intel Israel
{"title":"Interconnect length impact investigation by measurements","authors":"Michael Sotman, Alexey Kostinsky, Genadiy Zobin, Intel Israel","doi":"10.1109/SPI.2007.4512203","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512203","url":null,"abstract":"The paper describes novel methodology for high frequency link/bus validation. For the first time the entire interconnect length range is covered. Frequency shmoo emulates PCB length change. The discovered resonance behavior correlates perfectly with theoretical prediction.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130957231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Characterization of electromagnetic leakages throughout the connector shell 贯穿连接器外壳的电磁泄漏特性
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512224
Y. Bouri, L. Koné, J. Razafiarivelo, D. Baudry, S. Baranowski, B. Démoulin
{"title":"Characterization of electromagnetic leakages throughout the connector shell","authors":"Y. Bouri, L. Koné, J. Razafiarivelo, D. Baudry, S. Baranowski, B. Démoulin","doi":"10.1109/SPI.2007.4512224","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512224","url":null,"abstract":"The paper deals with methodology to analyze electromagnetic (EM) leakages from connectors shielding due to the presence of apertures and slots. Some experimental and numerical results will be proposed to evaluate the electromagnetic coupling between connector apertures and a PCB trace line in terms of current and voltage induced on the line.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115721388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Interconnection effects in Package on Package design 包装互连对包装设计的影响
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512239
P. Pulici, G. Candela, G. Campardo, G. Vanalli, P. Stoppino, A. Losavio, T. Lessio, M. Dellutri, D. Guarnaccia, F. Lo Iacono
{"title":"Interconnection effects in Package on Package design","authors":"P. Pulici, G. Candela, G. Campardo, G. Vanalli, P. Stoppino, A. Losavio, T. Lessio, M. Dellutri, D. Guarnaccia, F. Lo Iacono","doi":"10.1109/SPI.2007.4512239","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512239","url":null,"abstract":"The PoP (Package on Package) design procedure is described in this paper, focusing principally on the constraints and the system characteristics. The PoP structure is more and more diffused because it increases the customer flexibility and the final yield by means of a separate testing of Top and Bottom devices. In this paper, a Top PoP design, composed by two stacked memory dice (a NOR Flash and a SDRAM), is described pointing out the electrical package impact. The memory PoP has to be accessed up to 250 Mb/s. Such a frequency involves the package to be designed basing on some rules and evaluating its electrical impact by means of a signal integrity flow.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116109101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Silicon-chip single and coupled coplanar transmission line measurements and model verification up to 50GHz 高达50GHz的硅片单和耦合共面传输线测量和模型验证
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512198
D. Goren, S. Shlafman, B. Sheinman, W. Woods, J. Rascoe
{"title":"Silicon-chip single and coupled coplanar transmission line measurements and model verification up to 50GHz","authors":"D. Goren, S. Shlafman, B. Sheinman, W. Woods, J. Rascoe","doi":"10.1109/SPI.2007.4512198","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512198","url":null,"abstract":"Silicon technology on-chip single and coupled coplanar transmission lines have been measured on wafer up to 50 GHz. De-embedding was performed using various methods including the L-2L technique [1,2] by measuring two transmission lines of original and double length. A novel approach has been used for the measurement of the coupled structures using conventional two port VNA. Results are investigated both in S-parameter format and in gamma-Zo format, and compared with EM solver and the parametric IBM coplanar T-line device models discussed elsewhere [3,4] which are available in IBM CMOS and SiGe technology design kits. A comparison with RC model shows the limits of RC model validity, in frequency domain.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122491573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Signal propagation over perforated reference planes 信号在穿孔参考平面上的传播
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512222
L. Shan, M. Ritter, A. Haridass, R. Weekly, D. Becker, E. Klink
{"title":"Signal propagation over perforated reference planes","authors":"L. Shan, M. Ritter, A. Haridass, R. Weekly, D. Becker, E. Klink","doi":"10.1109/SPI.2007.4512222","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512222","url":null,"abstract":"Voids on reference planes are commonly seen in organic chip packages and printed circuit boards. In this paper, the effects of these voids on the signal integrity of a high-density data bus will be studied. A generic FCPBGA chip package is used to illustrate the signal integrity concerns and perform sensitivity analysis on the key mechanisms including void size, adjacent plane interactions, and adjacent signal line interactions. The results show that proper design can mitigate the signal integrity impact of reference plane voids.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122721504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
An absolutely-stable arbitrarily high-order implicit numerical integration method and its application to the time-domain simulation of interconnect circuits 一种绝对稳定任意高阶隐式数值积分方法及其在互连电路时域仿真中的应用
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 2007-05-13 DOI: 10.1109/SPI.2007.4512246
E. Gad, M. Nakhla, R. Achar, Yinghong Zhou
{"title":"An absolutely-stable arbitrarily high-order implicit numerical integration method and its application to the time-domain simulation of interconnect circuits","authors":"E. Gad, M. Nakhla, R. Achar, Yinghong Zhou","doi":"10.1109/SPI.2007.4512246","DOIUrl":"https://doi.org/10.1109/SPI.2007.4512246","url":null,"abstract":"This paper presents an outline of a new integration method and describes the results of its application in simulating electric circuits in the time-domain. The proposed method does not suffer from the stability vs. order limitation of classical linear multistep methods. Hence, it enables using arbitrarily high- order approximations to the circuit waveforms while maintaining the stability over the entire left side of the complex-plane (A-stability).","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131771399","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Poster session A modeling and analysis of interconnects 对互连的建模和分析
2007 IEEE Workshop on Signal Propagation on Interconnects Pub Date : 1900-01-01 DOI: 10.1109/spi.2007.4512240
{"title":"Poster session A modeling and analysis of interconnects","authors":"","doi":"10.1109/spi.2007.4512240","DOIUrl":"https://doi.org/10.1109/spi.2007.4512240","url":null,"abstract":"","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114537916","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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