D. Goren, S. Shlafman, B. Sheinman, W. Woods, J. Rascoe
{"title":"高达50GHz的硅片单和耦合共面传输线测量和模型验证","authors":"D. Goren, S. Shlafman, B. Sheinman, W. Woods, J. Rascoe","doi":"10.1109/SPI.2007.4512198","DOIUrl":null,"url":null,"abstract":"Silicon technology on-chip single and coupled coplanar transmission lines have been measured on wafer up to 50 GHz. De-embedding was performed using various methods including the L-2L technique [1,2] by measuring two transmission lines of original and double length. A novel approach has been used for the measurement of the coupled structures using conventional two port VNA. Results are investigated both in S-parameter format and in gamma-Zo format, and compared with EM solver and the parametric IBM coplanar T-line device models discussed elsewhere [3,4] which are available in IBM CMOS and SiGe technology design kits. A comparison with RC model shows the limits of RC model validity, in frequency domain.","PeriodicalId":206352,"journal":{"name":"2007 IEEE Workshop on Signal Propagation on Interconnects","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Silicon-chip single and coupled coplanar transmission line measurements and model verification up to 50GHz\",\"authors\":\"D. Goren, S. Shlafman, B. Sheinman, W. Woods, J. Rascoe\",\"doi\":\"10.1109/SPI.2007.4512198\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Silicon technology on-chip single and coupled coplanar transmission lines have been measured on wafer up to 50 GHz. De-embedding was performed using various methods including the L-2L technique [1,2] by measuring two transmission lines of original and double length. A novel approach has been used for the measurement of the coupled structures using conventional two port VNA. Results are investigated both in S-parameter format and in gamma-Zo format, and compared with EM solver and the parametric IBM coplanar T-line device models discussed elsewhere [3,4] which are available in IBM CMOS and SiGe technology design kits. A comparison with RC model shows the limits of RC model validity, in frequency domain.\",\"PeriodicalId\":206352,\"journal\":{\"name\":\"2007 IEEE Workshop on Signal Propagation on Interconnects\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Workshop on Signal Propagation on Interconnects\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPI.2007.4512198\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Workshop on Signal Propagation on Interconnects","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPI.2007.4512198","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Silicon-chip single and coupled coplanar transmission line measurements and model verification up to 50GHz
Silicon technology on-chip single and coupled coplanar transmission lines have been measured on wafer up to 50 GHz. De-embedding was performed using various methods including the L-2L technique [1,2] by measuring two transmission lines of original and double length. A novel approach has been used for the measurement of the coupled structures using conventional two port VNA. Results are investigated both in S-parameter format and in gamma-Zo format, and compared with EM solver and the parametric IBM coplanar T-line device models discussed elsewhere [3,4] which are available in IBM CMOS and SiGe technology design kits. A comparison with RC model shows the limits of RC model validity, in frequency domain.