Proceedings of 1st International Symposium on Plasma Process-Induced Damage最新文献

{"title":"Surface Photovoltage and Contact Potential Difference Imaging of Defects Introduced by Plasma Processing of IC Devices","authors":"K. Nauka, J. Theil, C. Chi, W. Greene, J. Shohet","doi":"10.1109/PPID.1996.715197","DOIUrl":"https://doi.org/10.1109/PPID.1996.715197","url":null,"abstract":"Integrated circuit (IC) manufacturing involves a large number of plasma processes ranging from anisotropic etching, isotropic stripping and cleaning, to plasma enhanced material deposition and implantation. It frequently occurs that undesirable reactions between the partially completed IC devices and plasma environment can lead to detrimental and permanent changes of device properties. Two the most frequently encountered device degradation mechanisms are: 1. unbalanced charge transfer between the wafer and plasma sheath leading to so-called “antennae damage”, and 2. “radiation damage” caused by bombardment of the wafer with high energy photons, particles, and ions causing bond breakage,","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129460167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Comprehensive Study on Radiation Damage in Plasma System","authors":"B. Tsui, Shunn-Her Liu, Jau-Hwang Ho, Chia-Haur Chang","doi":"10.1109/PPID.1996.715225","DOIUrl":"https://doi.org/10.1109/PPID.1996.715225","url":null,"abstract":"These years, most of the works concerning the gate oxide degradation during dry etch process are concentrated on the plasma nonuniformity induced wafer chargeup (antenna effect)[ 1-31. However, recent studies on poly-Si gate etching showed that the oxide near the gate edge may be damaged by radiation exposure and/or ion bombardment[4,5]. In this work, it is observed that radiation occurs during the whole plasma turn-on period. Radiation characteristic are studied systematically. The impact of radiation on gate oxide integrity is also discussed.","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123426920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Creation of Slow Traps in MOS Capacitors furing RF Plasma Etching","authors":"P. Tanner, S. Dimitrijev, Y. Yeow, H. B. Harrison","doi":"10.1109/PPID.1996.715231","DOIUrl":"https://doi.org/10.1109/PPID.1996.715231","url":null,"abstract":"","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129061377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A New Methodology for Monitoring and Comparing Edge Exposure and Plasma Charging Current Damage from Plasma Processing","authors":"S. Fonash, M. Ozaita, M. Okandan, O. Awadelkarim, Y. Chan","doi":"10.1109/PPID.1996.715208","DOIUrl":"https://doi.org/10.1109/PPID.1996.715208","url":null,"abstract":"We have recently demonstrated that gate-definition reactive ion etching (NE) of polycrystalline silicon (poly-Si) gate, 0.5 pm channel length MOSFET transistors can cause plasma exposure edge damage El] in addition to the well-known plasma charging current damage. Here we focus more closely on this gate edge damage and show, for the first time, that it manifests itself as distinct trapping and detrapping localized states at or near the SiOgsubstrate Si interface in the thin gate oxide around the gate perimeter. In this study we used devices of the type shown in Fig. l(a) with the gate edge over field oxide(which we term field devices) or in Fig. 2(a) with the gate edge over gate oxide (which we term gate devices). Both types of devices were fabricated on 8 in., p-type epitaxial Si wafers with poly-Si over 70A gate oxide active regions that were defined using the LOCOS technique. The gate devices had two variations : one with the same perimeter as the field device and the other, referred to hereafter as comb-structure gate device, with 25 times the perimeter of the field device. All gate and field devices had the same active area. We note that the field device represents the situation in a transistor during gate definition etch up to the overetch ; i. e., any plasma damage must be due to the flow of plasma charging currents. The gate devices, however, represent the situation in a transistor afier the main and overetch ; i. e., the gate oxide at the gate edge has now been exposed to the particle and photon bombardment of the plasma. To compare etch damage in these structures a simple, twoterminal characterization approach using cyclic voltage-sweep current-voltage (IV) measurements was undertaken in the pre-Fowler-Nordheim voltage regime. More precisely, I was measured at some adjustable time Atd after a step dV/dt (t is time) in the sweep. Sweeping-induced charging current peaks were found as seen in Figs. l@) and 2@) for a field device and a gate device, respectively. These peaks represent trapping and detrapping charging currents siice their sign depends on the sense of dV/dt. The fact that some of the trapping and detrapping states seen in Fig. 2b are located at the device edge is very evident from our comb-structure gate devices where the forward charging peaks were found to be more than 20 times those seen in the field devices. These trapping/detrapping current peaks essentially disappear in field devices and are diminished in gate devices upon white light illumination (Figs. l(c) and 2(c)). This suggests that the localized states giving rise to the peaks communicate with the Si substrate and, in the presence of photogenerated carriers, they are able to charge and discharge within the measurement time Atd. Differences in these trappinddetrapping states in field devices and gate devices are apparent with annealing and FowlerNordheim (FN) stress. The differences seen with annealing at 400 \"C in forming gas (6% H2 and 94% N2) for 30 minutes are ","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124424370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Assessment of charge-induced damage from High Density Plasma (HDP) Oxide Deposition","authors":"S. Krishnan, S. Nag","doi":"10.1109/PPID.1996.715204","DOIUrl":"https://doi.org/10.1109/PPID.1996.715204","url":null,"abstract":"Plasma CVD oxides play a critical role in back-end process integration of the sub-0Spm node interconnect. In particular, HDP-CVD offers unique solutions to ILD challenges by achieving gap-filling of small geometries without void formation, while maintaining a high oxide quality with low etch rate and hydrogen content [I]. The HDP-CVD process uses a SiH4, 0 2 , Ar chemistry and an Inductively Coupled Plasma (ICP) source to generate a high density plasma on the order of 1E12 ions/cm3. Sufficient concentration of ions at low-pressure is provided to simultaneously sputter the depositing silicon dioxide at high efficiency when an RF bias is supplied to the wafer substrate. Thus, gap-filling of sub-0.5 p n geometries (like the one shown in Fig.1) is achieved by creating a faceted oxide profile that counteracts the “cusping” step coverage profile from PECVD-like deposition [I]. However, the use of ICP high density plasma (with substantial sputtering component) may stress the gate oxide of CMOS devices similar to our recent observation of severe charging caused by ICP metal etch [2]. In this paper we will assess the damage to transistors with 35 to 60A gate oxide when HDPCVD is used at metal level for interlevel dielectric (ILD) and poly level for poly-metal dielectric (PMD) applications.","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132097951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Photons, Charging Currents, Hydrogen, and Particle Bombardment - The Four Horsemen of Plasma Etching","authors":"S. Fonash","doi":"10.1109/PPID.1996.715236","DOIUrl":"https://doi.org/10.1109/PPID.1996.715236","url":null,"abstract":"","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132865532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Plasma Damage Characterization of the Decoupled Plasma Source (DPS) Reactor","authors":"S. Krishnan, B. Hallet, J. Schell","doi":"10.1109/PPID.1996.715241","DOIUrl":"https://doi.org/10.1109/PPID.1996.715241","url":null,"abstract":"With the recent introduction of high density plasma etch equipment using a variety of sources (ICP, Helicon, ECR etc.), charge induced damage has become a significant concern, especially as devices enter the subhalf micron regimes where the gate dielectrics are ultrathin. Recently, a Decoupled Plasma Source (DPS) has been developed 1) to provide a uniform high ion density over a large process window, 2) to maintain a linear plasma density dependence on the inductive RF power and 3) to apply a minimum bias power to maintain device integrity while achieving all other etch requirements [ 111. In this paper, we characterize the DPS metal etch reactor for any process-induced damage related issues for various process and hardware configurations using full-flaw devices designed for detecting charging [2]. Process parameters varied include pressure, source power and bias power. Hardware changes include mechanical wafer clamping or electrostatic chuck (ESC), coil and dome configuration, and the plasma source-to-wafer distance.","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129309763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Charging of Underlayer at Via Etch causing Slow Down in Oxide Etch Rate","authors":"T. Dao, W. Wu","doi":"10.1109/PPID.1996.715202","DOIUrl":"https://doi.org/10.1109/PPID.1996.715202","url":null,"abstract":"A new charging phenomenon during dry etch fs discussed in this paper. Plasma oxide etching requires high energy ion bombardment to assist the chemical etching and enhance etch rate. However, bombardment of high energy ions and electrons has been shown to cause physical or charging damage to the submicron transistor devices, and affects the etching profile. In this paper, etch rate of a dielectric film over metal lines or pad is shown to be dependent on the charging conditions of the metal line or pad itself. Charging of the floating metal line or pad causes a decrease in the etchrate of the dielectric film.","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116828321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Effect of the Effective Channel Length Induced by Plasma Etching","authors":"S.H. Yang, C. Lan, S.L. Pang, B.J. Chang, K. Lu, J.S. Liu, J. Yang","doi":"10.1109/PPID.1996.715213","DOIUrl":"https://doi.org/10.1109/PPID.1996.715213","url":null,"abstract":"Dry etching including plasma etching and reactive ion etching(RIE) is an important process in controlling etching profile for Ultra-large-scale-integration circuit. However, it will cause contamination and damage induced by ion bombarment on the exposed silicon surface during plasma or reactive ion etching.14 If not removed, the contamination and damage will influence the quality of the grown oxide at the following ~ t e p . ~ > ~ In this experiment, the thin source-drain (SD) oxide grown on the silicon surface dry etched by different conditions and the effective channel length (Leff) in MOS device have been investigated. The Leff is probably influenced by the boron S/D dope depth that will be changed due to different S/D oxide thickness.","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130272331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Sub-quarter Micron Poly-Si Etching With Positive Pulse Biasing Technique","authors":"N. Kofuji, K. Tsujimoto, T. Mizutani","doi":"10.1109/PPID.1996.715246","DOIUrl":"https://doi.org/10.1109/PPID.1996.715246","url":null,"abstract":"","PeriodicalId":206175,"journal":{"name":"Proceedings of 1st International Symposium on Plasma Process-Induced Damage","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130411371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}