{"title":"Short circuit capability and high temperature channel mobility of SiC MOSFETs","authors":"Jiahui Sun, Hongyi Xu, Xinke Wu, Shu Yang, Qing Guo, Kuang Sheng","doi":"10.23919/ISPSD.2017.7988988","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988988","url":null,"abstract":"Short circuit capability of a 1200V SiC MOSFET and a 1200V Si IGBT is compared and analyzed in this work, and the channel mobility in the SiC MOSFET over a broad temperature range from room temperature up to 2000 °C has been extracted for the first time. Experimental results show that SiC MOSFET exhibits shorter short circuit withstand time (SCWT) compared to Si IGBT. 1-D transient finite element thermal models of SiC MOSFETs and Si IGBTs have been implemented to simulate the dynamic temperature profiles in devices during short circuit tests. The junction temperature of SiC MOSFET rises much faster than that of Si IGBT and the heat spreading thickness of SiC MOSFET is much narrower, leading to shorter SCWT of the SiC MOSFET. Combining the experimental and thermal simulation results, the temperature-dependent saturation drain current in SiC MOSFETs is extracted. Based on this, the channel mobility over a wide temperature range is obtained.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"196 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122110351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Takuya Yamaguchi, Hideki Okumura, T. Shiraishi, Tsuyoshi Fujita, Yoshifumi Ata, Kenya Kobayashi
{"title":"High aspect ratio deep trench termination (HARDT2) technique surrounding die edge as dielectric wall to improve high voltage device area efficiency","authors":"Takuya Yamaguchi, Hideki Okumura, T. Shiraishi, Tsuyoshi Fujita, Yoshifumi Ata, Kenya Kobayashi","doi":"10.23919/ISPSD.2017.7988883","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988883","url":null,"abstract":"In high voltage power devices, to improve an active device area efficiency, a new edge termination structure that applying high aspect ratio deep trench termination technique is presented. The narrow trench filled with dielectric material acts as not only an electric field relaxing layer but also a reliable hard passivation. By using this technique, the active device area efficiency is maximized up to 96% with high reliability and good dynamic characteristics for 500 to 600 V MOSFETs.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129092373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
I. Kasko, S. Berberich, M. Gross, P. Beckedahl, S. Buetow
{"title":"High efficient approach to utilize SiC MOSFET potential in power modules","authors":"I. Kasko, S. Berberich, M. Gross, P. Beckedahl, S. Buetow","doi":"10.23919/ISPSD.2017.7988909","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988909","url":null,"abstract":"A holistic approach taking benefit from optimization of chip, assembly technology and module design was utilized to exploit the performance potential of SiC power modules. A novel MOSFET SiC module (1200V, 400A) with extremely low inductance (1.4nH) was designed and assembled using Semikron DPD (Direct Pressed Die) technology. The electrical measurements showed excellent switching performance (switching speed up to ∼53kV/μs for dv/dt and ∼67kA/μs for di/dt) and very low energy losses (80% lower than state of the art Si based IGBT module). The enhanced reliability was demonstrated by power cycling tests (8–10x life time improvement compared to conventional assembly of SiC devices).","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117276494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power electronics as the enabling technology for sustainable energy in the smart city","authors":"J. Driesen","doi":"10.23919/ISPSD.2017.7988978","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988978","url":null,"abstract":"This paper discusses the technology trends behind the energy transition happening in the energy system of modern cities, linked to electrification, decentralization and digitalization. The role of power electronics, with a focus on building-level technologies, and the derived future requirements for converters and components are discussed. It is demonstrated using relevant use cases that power electronics represents “the new blocks that keep the building upright”.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124586905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Switching characteristics of monolithically integrated Si-GaN cascoded rectifiers","authors":"Jie Ren, Chao Liu, C. Tang, K. Lau, J. Sin","doi":"10.23919/ISPSD.2017.7988928","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988928","url":null,"abstract":"In this paper, the switching performance of monolithically integrated Si-GaN cascoded rectifiers is presented. The reverse recovery charge of the cascoded rectifier is 86.2% less than that of a Si fast recovery diode (FRD), which reveals great potential of cascoded rectifiers for high-speed power switching applications. Moreover, the double pulse tests are carried out for the cascoded rectifiers formed by monolithic integration and wire-bonding. The resulting power spectral densities show that the monolithically integrated one does not have current oscillation compared to that of the wire-bonded one.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127815243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Challenges in reliably driving GaN devices","authors":"Paul Brohlin","doi":"10.23919/ISPSD.2017.7988874","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988874","url":null,"abstract":"GaN's properties of low Coss, Crss, and lack of reverse recovery make it a more efficient power switch versus silicon. These characteristics enable higher-frequency hard-switched topologies such as totem-pole bridgeless power factor converter (PFC) that cannot be realized by silicon MOSFETs and insulated-gate bipolar transistors (IGBTs) due to their high switching losses. To take advantages of these properties, GaN must be switched quickly and reliably. This paper examines requirements for the driver, package, and the GaN HEMT to enable efficient and reliable switching.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127902823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New calorimetrie power transistor soft-switching loss measurement based on accurate temperature rise monitoring","authors":"D. Neumayr, M. Guacci, D. Bortis, J. Kolar","doi":"10.3929/ETHZ-B-000187520","DOIUrl":"https://doi.org/10.3929/ETHZ-B-000187520","url":null,"abstract":"Modern GaN and SiC power semiconductors require new experimental methods for determining switching losses as the widely accepted double-pulse-test (DPT) fails to accurately capture the dissipated energy during a switching transition because of electrical measurement limitations imposed by the very fast switching of WBG devices. In this paper, a new calorimetric measurement principle which relies on temperature rise monitoring of an aluminum heat sink during continuous operation of the attached power semiconductor is presented. Unlike traditional calorimetric methods, a single measurement can be performed in minutes. Using the proposed measurement principle, a soft-switching performance evaluation of selected 600 V GaN, SiC and Si power transistors is provided.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131757862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Advanced RFC diode utilizing a novel vertical structure for soilness and high dynamic ruggedness","authors":"Katsumi Nakamura, K. Shimizu","doi":"10.23919/ISPSD.2017.7988940","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988940","url":null,"abstract":"This paper reports for the first time that the freewheeling diode (FWD) with Relaxed Field of Cathode (RFC) technology can achieves excellent total performance by adopting a novel vertical structure. The proposed vertical structure consists of a “Light Punch-Through (LPT) II” and a “Controlling Carrier-Plasma Layer (CPL)”. The measured results of 1200 V diode show that the total loss and dynamic behavior such as the recovery softness and the dynamic ruggedness are greatly improved thanks to the proposed vertical concept. These improvements are the result of controlling the charge-carrier plasma layer and moderating the electric field gradient in CPL zone during the recovery operation. The advanced RFC diode clearly breaks through the trade-off triangle of the total loss, the recovery softness and the recovery SOA of the FWD.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134453135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Qian Wang, Xinhong Cheng, Li Zheng, Lingyan Shen, Jingjie Li, Dongliang Zhang, R. Qian, Yuehui Yu
{"title":"PEALD induced interface engineering of AlNO/AlGaN/GaN MIS diode with alternate insertion of AlN in Al2O3","authors":"Qian Wang, Xinhong Cheng, Li Zheng, Lingyan Shen, Jingjie Li, Dongliang Zhang, R. Qian, Yuehui Yu","doi":"10.23919/ISPSD.2017.7988926","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988926","url":null,"abstract":"Atomic layer deposited Al<inf>2</inf>O<inf>3</inf> is an industry-accepted gate dielectric used in the AlGaN/GaN MIS-HEMT structure, but direct deposition of Al<inf>2</inf>O<inf>3</inf> on AlGaN/GaN will lead to the formation of detrimental Ga-O bonds, resulting in high-density interface traps. In this work, alternate AIN incorporation in Al<inf>2</inf>O<inf>3</inf> to form AINO nano-films is proposed to suppress the gate leakage current and reduce interface trap density. In addition, nitrogen can incorporate on either cation/anion sites or interstitial sites and thus becomes a source of negative fixed charges within Al<inf>2</inf>O<inf>3</inf>, which can contribute to positive shifting of flat band voltage (V<inf>fb</inf>).","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"257 12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117144572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhuo Yang, Jing Zhu, Xin Tong, Weifeng Sun, F. Bian, Ye Tian, Yuanzheng Zhu, Peng Ye, Zongqing Li, Bo Hou
{"title":"Investigations of inhomogeneous reverse recovery behavior of the body diode in superjunction MOSFET","authors":"Zhuo Yang, Jing Zhu, Xin Tong, Weifeng Sun, F. Bian, Ye Tian, Yuanzheng Zhu, Peng Ye, Zongqing Li, Bo Hou","doi":"10.23919/ISPSD.2017.7988934","DOIUrl":"https://doi.org/10.23919/ISPSD.2017.7988934","url":null,"abstract":"This work provides a physical insight into the failure of Superjunction MOSFET (SJ-MOSFET) for full bridge inverter system during an reverse recovery behavior. The inspection of failed SJ-MOSFET reveals burnt-out points in the vicinity of the device edge termination. To explore this result, physical TCAD simulations have been carried out. It is found that there is an extremely inhomogeneous reverse recovery behavior between the active region and the termination region in the SJ-MOSFET. And a destructive dynamic avalanche phenomenon is occurred at the edge of the termination, which is identified as responsible for the observed failure. Finally, an optimization termination structure with P+ dynamical field limiting ring (DFLR) is proposed to suppress the dynamical avalanche and the reverse recovery robustness of the proposed structure is improved by 200%.","PeriodicalId":202561,"journal":{"name":"2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115638866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}