Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)最新文献_第6页

Chip-package codesign-challenges and directions 芯片封装代码设计——挑战与方向

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760047

P. Franzon

{"title":"Chip-package codesign-challenges and directions","authors":"P. Franzon","doi":"10.1109/ASPDAC.1999.760047","DOIUrl":"https://doi.org/10.1109/ASPDAC.1999.760047","url":null,"abstract":"Increasingly the package, and associated discretes, contribute critically to the overall circuit performance, rather than just providing a connection function. These performance issues are critical today and are fast becoming more complex than current CAD tool trends will be able to support. For example, in today's digital systems, the package design is an important part of the signal integrity equation, and a major determinant of board routing costs. The concentration is on signal integrity management. However, in tomorrow's systems, the promise of high density packaging presents novel integration opportunities that will require new design approaches beyond just managing signal integrity; other connectivity and performance issues will enter into play. For today's RF and analog systems, the package is part of the load and antenna environment and again presents a difficult signal integrity analysis. In tomorrow's systems, new technologies and higher performance/frequency requirements will require system modeling solutions far superior to those offered today. In both types of systems, the package design is starting to require the sophistication normally reserved for the IC design. It is time for the packaging CAD tools to recognize this trend and prepare for it. The author reviews these system design trends and gives examples from work performed at NCSU and elsewhere. He also presents the state of the art for CAD support for chip-package codesign and postulates that the continuation of current trends will not give satisfactory solutions for future systems. It is argued that a new approach is needed, one hinging on codesigning the package, chip and system in a unified chip-centric environment while maintaining suitable levels of abstraction to permit interaction across inter-disciplinary teams.","PeriodicalId":201352,"journal":{"name":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127746055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

The hierarchical h-adaptive 3-D boundary element computation of VLSI interconnect capacitance VLSI互连电容的分层自适应三维边界元计算

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759719

Jinsong Hou, Zeyi Wang, Xianlong Hong

引用次数: 12

Faster and better spectral algorithms for multi-way partitioning 更快更好的多路划分谱算法

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759715

Jan-Yang Chang, Yu-Chen Liu, Ting-Chi Wang

引用次数: 1

Motion estimator LSI for MPEG2 high level standard 运动估计LSI为MPEG2高电平标准

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759705

Li Jiang, Dongju Li, Shintaro Haba, C. Honsawek, H. Kunieda

引用次数: 0

Design method of MTCMOS power switch for low-voltage high-speed LSIs 用于低压高速lsi的MTCMOS功率开关设计方法

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759726

S. Mutoh, S. Shigematsu, Yoshinori Gotoh, S. Konaka

{"title":"Design method of MTCMOS power switch for low-voltage high-speed LSIs","authors":"S. Mutoh, S. Shigematsu, Yoshinori Gotoh, S. Konaka","doi":"10.1109/ASPDAC.1999.759726","DOIUrl":"https://doi.org/10.1109/ASPDAC.1999.759726","url":null,"abstract":"The design of the power switch which turns on and off the power supply to the logic gates is essential to low-voltage high-speed circuit techniques such as multi-threshold voltage CMOS (MTCMOS). This is because this switch influences the speed, area, and power of a low-voltage LSI. This paper describes the influences of the power switch on the circuit performance in detail, and proposes a systematic method for designing a power switch which takes them into consideration for the first time. The main feature of this method, called the average-current method, is the use of the average current consumed in an LSI to determine the power-switch size. This makes it easy for designers to determine the minimum size of the power-switch needed to satisfy the required speed, which results in minimizing the area penalty and the standby power. Useful analytical formula and the practical determination flow are also described. Measurement of an actual 0.25 /spl mu/m MTCMOS/SIMOX 290-Kgate LSI operating at 1 V confirmed the effectiveness of this method. This method estimated well the required power-switch width, and as a result it reduced the area penalty and standby current by about 80% compared to the conventional design scheme.","PeriodicalId":201352,"journal":{"name":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","volume":"47 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132939674","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 54

A clustering based linear ordering algorithm for K-way spectral partitioning 基于聚类的K-way谱划分线性排序算法

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759714

Shiuann-Shiuh Lin, Wen-Hsin Chen, Wen-Wei Lin, TingTing Hwang

引用次数: 0

A new global routing algorithm independent of net ordering 一种不依赖网络排序的全局路由算法

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760006

Haiyun Bao, Xianlong Hong, Yici Cai

引用次数: 0

Optimal wire shape with consideration of coupling capacitance under Elmore delay model Elmore延迟模型下考虑耦合电容的线形优化

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759999

Youxin Gao, D. F. Wong

引用次数: 1

Electronics development of silicon microdisplay for virtual reality applications 用于虚拟现实应用的硅微显示器的电子学开发

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759994

P. Cheng, H. C. Huang

引用次数: 0

A new single-clock flip-flop for half-swing clocking 一种新的单时钟触发器，用于半摆动时钟

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759727

Young-Su Kwon, Bong-Il Park, I. Park, C. Kyung

引用次数: 23