运动估计LSI为MPEG2高电平标准

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI:10.1109/ASPDAC.1999.759705

Li Jiang, Dongju Li, Shintaro Haba, C. Honsawek, H. Kunieda

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引用次数: 0

摘要

本设计提出了一种MPEG2专用的运动估计LSI。将比特截断自适应金字塔(BTAP)算法与windows - mspa架构相结合，采用自定义单元和全自定义设计方法，采用0.5 /spl mu/m的2级金属CMOS技术，芯片尺寸达到4.8 mm/spl倍/4.8 mm。测试芯片工作频率为41.5 MHz，对图像尺寸为1920/ 1152 /spl times/1152的搜索范围为/spl plusmn/67，视频速率为30场/秒。

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Motion estimator LSI for MPEG2 high level standard

In this design, a dedicated motion estimation LSI of MPEG2 is presented. Combining the bits truncation adaptive pyramid (BTAP) algorithm with Window-MSPA architecture as well as by using custom cell and full custom design methods the chip size becomes 4.8 mm/spl times/4.8 mm with 0.5 /spl mu/m 2-level-metal CMOS technology. The test chip which works at 41.5 MHz, possesses a search range of /spl plusmn/67 for image size of 1920/spl times/1152 and achieves video rate of 30 fields/s.

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Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)

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