Motion estimator LSI for MPEG2 high level standard

Abstract

In this design, a dedicated motion estimation LSI of MPEG2 is presented. Combining the bits truncation adaptive pyramid (BTAP) algorithm with Window-MSPA architecture as well as by using custom cell and full custom design methods the chip size becomes 4.8 mm/spl times/4.8 mm with 0.5 /spl mu/m 2-level-metal CMOS technology. The test chip which works at 41.5 MHz, possesses a search range of /spl plusmn/67 for image size of 1920/spl times/1152 and achieves video rate of 30 fields/s.