International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)最新文献_第2页

The effect of fillet height and bondline thickness on the mechanical performance of a plastic package 圆角高度和粘结线厚度对塑料包装机械性能的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904191

I. Rasiah, C. Breach

{"title":"The effect of fillet height and bondline thickness on the mechanical performance of a plastic package","authors":"I. Rasiah, C. Breach","doi":"10.1109/EMAP.2000.904191","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904191","url":null,"abstract":"The general direction in IC assembly has been towards thinner packages with larger number of leads. This has led to die back grinding to meet package thickness requirements. In addition, the line width of the circuitry on the die has also been shrinking, making the die footprint smaller. These moves have caused most packages to change in size but the package type has not changed. Some typical examples would be the QFP, SOIC and PBGAs. In all these instances, IC assembly houses have found themselves having to contend with issues such as the package form factor, wirebonding and reliability. Engineers are finding that the materials set that met all the requirements of the package in its earlier form do not necessarily fit the needs of the new dimensions of the shrunken package. This has led to the unenviable task of considering materials requalification. Die attach in particular has been a source of problems. Low modulus adhesives that met all requirements for larger and thicker dice now cause wirebonding issues. The very low modulus of the material that was essential for package reliability now causes a bouncing issue during die wirebonding. This study examines this problem from a mechanical viewpoint. A theory for the bouncing phenomenon is given while the actual change in die height is measured. The effect of the fillet height and the bondline on the bouncing phenomena is studied using a DTMA where the package is tested. Details of the test set-up are given. The influence of the temperature is also verified. Recommendations are made on how one can overcome the problem of bouncing during wirebonding.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116304044","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Materials interaction between inherent barrier Pb-free Sn-Zn-Al solder and Cu contact 无铅Sn-Zn-Al焊料固有势垒与Cu接触之间的材料相互作用

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904183

Kwang-Lung Lin, Hui-min Hsu

引用次数: 1

The application of mold flow simulation in electronic package 模流仿真在电子封装中的应用

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904175

K. Chai, V. Liu, Y. Wang, T. Her

{"title":"The application of mold flow simulation in electronic package","authors":"K. Chai, V. Liu, Y. Wang, T. Her","doi":"10.1109/EMAP.2000.904175","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904175","url":null,"abstract":"The application of CAE in mold flow of IC packaging has been developed for years. However, to predict EMC flow behavior accurately in IC packages during transfer molding is still a huge challenge due to its intrinsic limitations. In this paper, modeling technologies to analyze mold flow during semiconductor encapsulation have been developed. The leadframe separates the whole molding cavity into top and bottom cavities. Cavity thickness is the most important factor to the mold flow behavior. Unbalanced flow, due to large thickness difference between top and bottom cavities, causes air trapping and die pad tilt. Some packages which have larger thickness difference, such as 1 to 3 thickness-ratio TSOP, LOC-TSOP, DHS, EDHS and DPH Q-series packages, have a seriously unbalanced melt-front during molding. By observing the flow phenomenon from short-shot samples, it is found that the cavity thickness, bonding wire density, the size of leadframe openings, and surface roughness all affect EMC flow behavior. By considering these factors into the construction of a simulation model, numerical results show excellent agreement with actual experimental results for a DPH-LQFP package. The melt-fronts of numerical and experimental results are compared and shown. Further investigation to improve the package moldability was also studied. By using CAE software, molding defects can be easily detected and moldability problems can be improved efficiently to reduce manufacturing cost and design cycle time.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130902522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

The mechanical properties degradation of solder joints under thermal cycling 热循环作用下焊点力学性能的退化

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904153

W. Qian, S. Lee, W. Gang-Qiang, Cheng Guohai, Hung Le, M. Ju-sheng

引用次数: 1

Influences of pad shape and solder microstructure on shear force of low cost flip chip bumps 焊盘形状和焊料微观结构对低成本倒装芯片凸点剪切力的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904138

Jian Cai, S. Law, A. Teng, P. Chan

{"title":"Influences of pad shape and solder microstructure on shear force of low cost flip chip bumps","authors":"Jian Cai, S. Law, A. Teng, P. Chan","doi":"10.1109/EMAP.2000.904138","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904138","url":null,"abstract":"The bumping process plays a critical role in flip chip technology. A low cost bumping process has been developed using electroless nickel and immersion gold followed by stencil printing. The process flow is described in this paper. The Al pad size is about 100 /spl mu/m in diameter with a pitch of 400 /spl mu/m. Different electroless plating solutions were evaluated and different solder pastes were used to evaluate the stencil printing process. Different pad shapes were also tested for shear strength. Ni studs with no bump material were fabricated to evaluate the electroless process. The shear force test result shows a strength value of 230 MPa for Ni studs. The solder bump after reflow has a diameter of 160 /spl mu/m and a height of 120 /spl mu/m. There is some difference in the shear force test results for different pad shapes. SEM and EDAX results of the fracture surface indicate that the fracture was cohesive or inside the solder. Cross sections showed some intermetallic layers at the interface. A Ni-Sn intermetallic layer and a phosphorus rich layer formed during reflow, which have compositions of Ni/sub 3/Sn/sub 4/ and Ni/sub 3/P respectively. The low cost flip chip samples were subjected to multiple reflows and shear force tests were performed. Fracture surfaces were analysed and failure modes were differentiated.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"61 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114126283","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Effect of moisture on the curing behaviour of underfills 水分对下填土固化性能的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904169

K. Chian, S. Lim, S. Yi, W.T. Chen

{"title":"Effect of moisture on the curing behaviour of underfills","authors":"K. Chian, S. Lim, S. Yi, W.T. Chen","doi":"10.1109/EMAP.2000.904169","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904169","url":null,"abstract":"This paper describes the curing, processing and thermomechanical behaviours of an anhydride-cured liquid epoxy based underfill polymer that was contaminated with water. Water was added to the uncured underfill system using two different routes, simulating two possible ways in which the underfill resin can be contaminated. In the first case, known amounts of water were added directly to a fully-formulated underfill, whilst in the second case, water was added to the epoxy resin prior to formulating the underfill system. The effects of the added water were studied using Fourier transform infrared (FTIR) spectra, differential scanning calorimetry (DSC), dynamic mechanical analyser (DMA) and light microscopy. This study shows that the presence of water resulted in rapid hydrolysis of the anhydride hardener to form solid crystalline carboxylic acid. It was found that the major cause of the flow disturbances during underfilling and deterioration in the final properties of the underfill was closely related to the occurrence of the carboxylic acid. Direct contamination of the formulated underfill was found to have the greatest impact on the material processing and thermomechanical properties.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"326 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122140516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

The effects of underfill and its material models on thermomechanical behaviors of flip chip package 下填料及其材料模型对倒装封装热力学行为的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904160

Z. Cheng, Liu Chen, Guozhong Wang, Xiaoming Xie, Qun Zhang

{"title":"The effects of underfill and its material models on thermomechanical behaviors of flip chip package","authors":"Z. Cheng, Liu Chen, Guozhong Wang, Xiaoming Xie, Qun Zhang","doi":"10.1109/EMAP.2000.904160","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904160","url":null,"abstract":"In this paper, underfill effects on thermomechanical behavior of two types (B and D) of flip chip packages with different bump sizes and stand-off heights were studied under thermal cycling by experiments and finite element analysis. Continuous electrical detection, intermittent C-SAM inspection and final metallographic analysis were used in the experiments. The material inelasticity, i.e. viscoelasticity of underfill U8437-3 and viscoplasticity of 60Sn40Pb solder, were considered in the simulations. Results show that use of underfill encapsulant greatly increases (/spl sim/20 times) SnPb solder joint thermal fatigue lifetime, weakens stand-off height effects on reliability, and changes the package deformation mode. It was found that thermal fatigue cracks occur in the maximum plastic strain range region, and a Coffin-Manson type equation could then be used for packages with or without underfill. It was observed that solder joint crack initiation occurred before delamination when using underfill with high adhesion (75 MPa), and underfill delamination may be not a dominant failure mode in this study. Moreover, the effects of underfill material models, i.e. constant elasticity (EC), temperature dependent elasticity (ET) and viscoelasticity (VE), on the thermomechanical behaviors of flip chip packages were also studied in the simulation. The VE model gives comparatively large plastic strain range, big displacements in the shear direction, and sequentially low solder joint lifetime. The ET model gives close results to the VE model and could be used instead of VE in simulations for the purpose of simplicity.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116285319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Solder shape design and thermal stress/strain analysis of flip chip packaging using hybrid method 基于混合方法的倒装芯片封装焊料形状设计及热应力/应变分析

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904131

Chang-Ming Liu, K. Chiang

{"title":"Solder shape design and thermal stress/strain analysis of flip chip packaging using hybrid method","authors":"Chang-Ming Liu, K. Chiang","doi":"10.1109/EMAP.2000.904131","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904131","url":null,"abstract":"As the interconnection density of electronic packaging continues to increase, fatigue-induced solder joint failure of surface mounted electronic devices has become a critical reliability theme in electronic packaging. Therefore, prediction of the solder joint shape is a major part of the development of electronic packaging for practical applications. In conventional electronic packaging, the geometrical dimensions of solder balls and solder pads remain the same. The maximum thermally induced stress/strain occurred on top surface of the solder joints located farthest away from the chip center, and may reduce the reliability life of the entire package. In this research, a hybrid method combining analytical and energy based methods is utilized to predict force-balanced heights and geometry profiles of solder balls under various solder volume and pad dimensions as well as their relative location during the reflow process. Next, the ANSYS finite element analysis code is implemented to investigate the stress/strain behavior of solder balls in flip chip packages under temperature cycles. The results reveals that as the flip chip package contains larger solder balls located at corner area underneath the chip, the maximum equivalent plastic strain/stress is evidently reduced and the reliability cycles under thermal loading are enhanced. Furthermore, the results presented in this research can be used as design guidelines for area array interconnections such as CSP, flip chip, wafer level packaging and fine pitch BGA.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121173784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

The effect of globtop process and material condition on voiding 球顶工艺和材料条件对空化的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904163

C. Wong, A. Teng

{"title":"The effect of globtop process and material condition on voiding","authors":"C. Wong, A. Teng","doi":"10.1109/EMAP.2000.904163","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904163","url":null,"abstract":"Chip-on-board (COB) packaging is a common IC packaging process in the Hong Kong-South China region. According to the packaging roadmap, the worldwide COB market trend is likely to expand to about 25 billion units per year by 2001 (Hwang, 1998). The popularity of COB is driven by its lower cost and its compatibility with PCB surface mounting processes. COB is now penetrating higher grade products such as telecommunications. There is increasing interest to make COB and globtop encapsulant materials more reliable and able to withstand stringent environmental conditions. This paper investigated possible sources of voiding in the dispensed glob-top material used in COBs. Factors such as substrate temperature, substrate preheat time, dispensing parameters, globtop thawing condition and curing profile were examined. The detection and quantification of voids was performed by C-mode and tomographic acoustic micro imaging (TAMI/sup TM/) mode scanning acoustic microscopy. It was found that voiding behavior was material dependent. Increased pot-life increased void density. It was observed that with optimized substrate temperature and preheat time, the number of voids could be reduced significantly. Also, materials cured at higher than recommended temperatures are more susceptible to voids at the globtop-substrate interface.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128534149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

The effect of core material surface roughness on line accuracy using electrodeposited photoresist 芯材表面粗糙度对电沉积光刻胶线精度的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904146

P. Jalonen, A. Tuominen

{"title":"The effect of core material surface roughness on line accuracy using electrodeposited photoresist","authors":"P. Jalonen, A. Tuominen","doi":"10.1109/EMAP.2000.904146","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904146","url":null,"abstract":"Miniaturization in electronics means finer lines and smaller vias in substrate technology. Very fine lines on the substrate are difficult to produce by conventional means. Thick copper layers are difficult to etch and the accuracy of conventional dry film photoresist is not necessarily sufficient. One very promising means of achieving fine lines is the etching of sputtered thin films on the substrate and growth of the copper with an additive method on the tiny lines. It has been shown that use of dry film photoresist is unsuitable for very narrow lines. Spinning the photoresist is an alternative, but in the test, its adhesion was not good enough. Most narrow resist lines were washed away in the development stage. To meet requirements for accuracy, the best method seemed to be the electrodeposited method, in which a very thin, even, homogenous photoresist layer can be generated. This fine layer is developed easily, thus allowing the transfer of fine line images to the substrate. For good accuracy on the metal lines, the core material beneath the sputtered metal layer must be smooth; the best accuracy can be achieved only with the smoothest surface. The differences between the original and only slightly brushed surfaces are not very obvious.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128429629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2