International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)最新文献_第3页

Measurement of water evaporation rate from epoxy 环氧水蒸发速率的测定

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904196

I. Chong, D. Lam, P. Tong

{"title":"Measurement of water evaporation rate from epoxy","authors":"I. Chong, D. Lam, P. Tong","doi":"10.1109/EMAP.2000.904196","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904196","url":null,"abstract":"Epoxy based materials are used as encapsulants to enhance the reliability of electronic packages. Epoxy is hygroscopic in nature and absorbs water when exposed to humidity. During solder reflow, the absorbed moisture in the package can generate steam pressure at interfacial defect voids and drive interfacial delamination, leading to popcorn failure of the package. Due to the lack of data, the steam pressure in the defect void has been assumed to be a single valued parameter, normally some fraction of the steam saturation pressure at a convenient temperature in popcorning models. A new experimental and analytical methodology to determine the engineering rate of water evaporation from polymer is described in this paper. The evaporation rate from water saturated epoxy is measured by thermogravimetric analysis (TGA). The experimental results indicate that the conventional estimate of water evaporation was found to overestimate the measured rate by nearly two orders of magnitude. To prevent steam driven delamination and popcorning in electronic packaging, the actual evaporation rate should be used in process design as well as polymer material selection.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128456200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Modelling the effect of geometrical scaling on micro-electronic packaging 几何尺度对微电子封装的影响建模

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904139

D. Hyslop, W. Muller, K. Ng, K. Tan, H. Albrecht

引用次数: 1

A study on the thermal deformation of ACF assemblies using moire interferometry and FEM 用云纹干涉法和有限元法研究ACF组件的热变形

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904180

T. Hwang, S. Ham, Soon-Bok Lee

{"title":"A study on the thermal deformation of ACF assemblies using moire interferometry and FEM","authors":"T. Hwang, S. Ham, Soon-Bok Lee","doi":"10.1109/EMAP.2000.904180","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904180","url":null,"abstract":"The use of flip-chip technology has many advantages over other approaches for high-density electronic packaging. ACF (anisotropic conductive film) is a major flip-chip technology, which has short chip-to-chip interconnection length, high productivity, and package miniaturization. Therefore, many researchers and manufacturers are interested in the ACF connection scheme. In this paper, the thermal deformations of ACF flip-chip assemblies are studied using moire interferometry and finite element analysis. First, the effects of filler content on the mechanical properties of ACF are studied theoretically and experimentally. In the theoretical study, material properties are calculated by analytical methods for composite materials such as the Mori-Tanaka method and the Shapery model. Effective material properties are utilized for finite element analysis. Second, thermal deformations of ACF assemblies are measured via moire interferometry. Isothermal loading, where /spl Delta/T=-75/spl deg/C, is applied to ACF assemblies. Finally, numerical verification between moire measurement and theoretical prediction is performed with finite element analysis.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115018485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

A new stress chip design for electronic packaging applications 一种用于电子封装的新型应力芯片设计

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904199

W. Hau, M. Yuen, G. Yan, P. Chan

{"title":"A new stress chip design for electronic packaging applications","authors":"W. Hau, M. Yuen, G. Yan, P. Chan","doi":"10.1109/EMAP.2000.904199","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904199","url":null,"abstract":"Stress sensing chips are invaluable for structural analysis of electronic packages, and can be used for in-situ real-time measurement of thermally induced die surface stress. Four-point-bending calibration, wafer-level calibration and hydrostatic calibration have been used to calibrate the stress sensing chip. These methods are used to calibrate different piezoresistive coefficients B/sub 1/, B/sub 2/ or their combinations (B/sub 1/-B/sub 2/), (B/sub 1/+B/sub 2/) and (B/sub 1/+B/sub 2/+B/sub 3/). Hydrostatic calibration is a bottleneck to quick calibration. Only one chip can be calibrated at a time and it must be wire bonded. Also, the value of coefficients (B/sub 1/+B/sub 2/+B/sub 3/) obtained is not temperature compensated and precise temperature measurement is required. Thus, a quick and accurate calibration method is key to making stress sensing chips more acceptable for electronic packaging use. In this paper, a new (111) stress sensing chip design is presented, and an innovative calibration scheme is proposed. Calibration can be done at wafer level, giving large savings in calibration time over the die form process. The mechanism is based on thermal expansion of the Al micro-beams which produce out-of-plane shear stresses on the sensing elements under temperature change. The relationship of normalized resistance change against temperature was found experimentally. Stresses produced by the Al micro-beam are high enough for calibration, with 4.6/spl sim/5.4% difference of normalized resistance changes between resistors with and without micro-beam. Also, a simple 1D model was proposed to estimate the order of magnitude of the stress under temperature change.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130635659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Ionic contamination in the component materials of IC packages IC封装元件材料中的离子污染

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904184

I. Rasiah, Ho Pei Sze

{"title":"Ionic contamination in the component materials of IC packages","authors":"I. Rasiah, Ho Pei Sze","doi":"10.1109/EMAP.2000.904184","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904184","url":null,"abstract":"IC packaging has always required that its components have little or no ionic contamination. This is necessary to avoid any corrosion issues within the package. This, in turn, has pushed the materials suppliers for the packaging industry to ensure that their products are free of contamination. Suppliers of materials ranging from leadframes and substrates to die attach adhesives and molding compounds have measured and reported their ionic contamination levels. They have, however, used their own specific methods and there has, up to now, been no standard for these tests. One of the reasons for a lack of standards is the fact that some of the materials such as die attach and mold compound have contamination levels that can be measured with respect to unit volume or weight of the material. Leadframes and substrates, on the other hand, have surface contamination and so the contamination levels are measured over their surface area. Yet another reason for a lack of standards is the variety of preparation methods employed within the industry. In this study, we measure the contamination levels in a range of IC packaging materials. These include varieties of leadframes, substrates, die attach and encapsulants. Methods for comparison are discussed while the specific details for sample preparation are given.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132376758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Reliability of wafer level chip scale package (WLCSP) with 96.5Sn-3.5Ag lead-free solder joints on build-up microvia printed circuit board 集成微孔印刷电路板上96.5Sn-3.5Ag无铅焊点的晶圆级芯片级封装(WLCSP)可靠性研究

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904133

J. Lau, S. Lee

引用次数: 5

Experimental and numerical analyses of flip-chip attach reliability 倒装芯片附加可靠性的实验与数值分析

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904140

A. Schubert, R. Dudek, B. Michel

引用次数: 0

Optimization of black oxide coating thickness as adhesion promoter for copper substrate 铜基材附着力促进剂氧化黑涂层厚度的优化

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904156

M. Lebbai, W. K. Szeto, Jang‐Kyo Kim

{"title":"Optimization of black oxide coating thickness as adhesion promoter for copper substrate","authors":"M. Lebbai, W. K. Szeto, Jang‐Kyo Kim","doi":"10.1109/EMAP.2000.904156","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904156","url":null,"abstract":"Black oxide is a conversion coating applied to a copper surface to improve the interface adhesion with polymeric adhesives and moulding compounds. State-of-the-art analytical instruments, including SEM, TEM, XPS, AFM, XRD, goniometry, dynamic SIMS and RBS were employed to characterize the coated surface and interfaces with glob top resins. It was found that the copper oxide layer consists of cupric and cuprous oxides with a continuous change of oxide composition from the top surface to the inside without a distinct boundary in between. Crystallinity of the oxides was barely detected directly from the black oxide coated copper. The cupric oxide exists in the form of a long, fibril structure on nanoscopic scale. The interface bond strength between the copper oxide and glob-top resin increased rapidly in the low range of oxide thickness and became almost constant with further increase in oxide thickness. A functionally similar dependence of oxide thickness and interface adhesion on treatment time was also revealed. Fracture occurred mainly within the oxide layer for black oxide coated substrates (i.e. cohesive failure of black oxide), while fracture tended to occur along the coating-resin interface (i.e. adhesive failure) once the coated surface is debleeded by sandblasting.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"94 4 Pt 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129477557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 20

Modelling the fatigue life of solder joints for surface mount resistors 模拟表面贴装电阻焊点的疲劳寿命

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904143

H. Lu, C. Bailey, M. Dusek, C. Hunt, J. Nottay

{"title":"Modelling the fatigue life of solder joints for surface mount resistors","authors":"H. Lu, C. Bailey, M. Dusek, C. Hunt, J. Nottay","doi":"10.1109/EMAP.2000.904143","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904143","url":null,"abstract":"This paper discusses the results from a modelling study that is being undertaken to compliment a large-scale experimental programme currently underway at the National Physical Laboratory. One aspect of this programme is to investigate the effect of different thermal cycles on both tin-lead and lead-free solder joints for surface mount resistor components. Detailed data gained from this part of the experimental programme is providing the opportunity to ensure that the models used are robust and appropriate for further in-depth cost-effective modelling studies on the behaviour, and possible failure, of such materials during thermal cycling. The paper primarily focuses on the modelling techniques and methodologies adopted to predict the response of solder materials to different thermal cycles. Three-dimensional models have been assembled to fully characterise the changing stress and strain profiles in the resistor component throughout a thermal cycle. The paper provides results from this modelling study that detail the reliability of tin-lead solder joints associated with four different thermal cycles. The modelling results appear to show that a large decrease in time per cycle, while keeping the thermal range constant, does not dramatically affect cycles to failure.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115607536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 26

Application of Py-GC/MS in electronic packaging industry for monitoring curing processes of EMCs Py-GC/MS在电子封装行业中监测EMCs固化过程的应用

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904194

Yijin Xu, A. Teng

引用次数: 0