2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems最新文献_第7页

Minimizing simultaneous switching noise at reduced power with power transmission lines for high-speed signaling 最大限度地减少同时开关噪声在降低功率与电力传输线路的高速信号

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457836

Satyanarayana Telikepalli, Madhavan Swaminathan, D. Keezer

引用次数: 2

Loewner-Matrix based efficient algorithm for frequency sweep of high-speed modules 基于低矩阵的高速模块扫频算法

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457873

M. Kabir, R. Khazaka, R. Achar, M. Nakhla

引用次数: 11

Eye prediction of digital driver with power distribution network noise 考虑配电网噪声的数字驱动器眼预测

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457859

Chiu-Chih Chou, Hao-Hsiang Chuang, Tzong-Lin Wu, Shih-Hung Weng, Chung-Kuan Cheng

引用次数: 8

Crosstalk through finite ground 通过有限地的串扰

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457877

Long Yang, J. Umaretiya

引用次数: 1

An unconditionally stable finite-element timedomain layered domain-decomposition algorithm for simulating 3D high-speed circuits 三维高速电路仿真的无条件稳定有限元时域分层域分解算法

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457867

Xiaolei Li, Jianming Jin

引用次数: 2

A partial homomorphic encryption scheme for secure design automation on public clouds 一种用于公共云安全设计自动化的部分同态加密方案

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457871

A. Yu, A. Sathanur, V. Jandhyala

引用次数: 5

S-parameter based multimode signaling 基于s参数的多模信令

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457832

Zhuo Yan, Chanyoun Won, P. Franzon, K. Aygun, H. Braunisch

引用次数: 5

Chip oriented target impedance for digital power distribution network design 面向芯片的数字配电网目标阻抗设计

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457881

M. Tanaka, M. Toyama, H. Nakashima, J. Yamada, M. Haida, I. Ooshima

{"title":"Chip oriented target impedance for digital power distribution network design","authors":"M. Tanaka, M. Toyama, H. Nakashima, J. Yamada, M. Haida, I. Ooshima","doi":"10.1109/EPEPS.2012.6457881","DOIUrl":"https://doi.org/10.1109/EPEPS.2012.6457881","url":null,"abstract":"With the advancements in semiconductor process technologies in recent years, noise management has become more difficult. Therefore power distribution network (PDN) design has become more important. This paper describes the target impedance build method. The key techniques are to find the impedance border line of normal chip operation and to set the target impedance which does not exceed that border line. The target impedance which is produced by the proposed method is useful in optimizing the design margin and reducing the chip/package/board size. From the experimental result using a 45-nm process Test Element Group (TEG) chip, the package size was reduced by 21.5%, and the chip size was reduced by 16.4% in comparison with the original design which was not designed using the target impedance. Furthermore, normal chip operation was confirmed by the actual measurement. On the other hand, a working design pattern was not able to be found in the target impedance which was produced by the conventional method. The experimental result demonstrates the validation of the proposed method.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125394468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Simulation and measurement correlation of random rough surface effects in interconnects 互连中随机粗糙表面效应的仿真与测量相关性

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457894

R. Ding, H. Braunisch, L. Tsang, Wenmo Chang

{"title":"Simulation and measurement correlation of random rough surface effects in interconnects","authors":"R. Ding, H. Braunisch, L. Tsang, Wenmo Chang","doi":"10.1109/EPEPS.2012.6457894","DOIUrl":"https://doi.org/10.1109/EPEPS.2012.6457894","url":null,"abstract":"We study the effects of three dimensional (3D) random roughness on wave propagation in a parallel plate metallic waveguide with finite conductivity. The surface roughness is characterized as a random process characterized by root mean square (rms) height, correlation length and power spectral density (PSD) function. The second order small perturbation method (SPM2) is applied to compute the coherent wave enhancement factors of absorption. A microstrip line structure is designed for validation of these enhancement factor results. Rough surface height profiles are measured on the substrate and the PSD is extracted. With the PSD we obtain the enhancement factor for the specific surface roughness. The attenuation constant of the microstrip line with rough surface can be estimated using a field solution for a smooth surface and the enhancement factor. The results for waveguides are also compared with the results obtained for a plane wave incident on a metal surface with 3D roughness. Comparison between the estimated and measured attenuation constant shows that the enhancement factor derived by SPM2 gives a better estimation than the standard Hammerstad and Bekkadal equation. The waveguide model gives more accurate enhancement factors than the plane wave model at frequencies above 20 GHz, especially for rough surfaces with rms heights larger than 2 μm.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"30 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130277787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Novel technology for power and signal integrity using a metal particle conductive layer 利用金属颗粒导电层实现电力和信号完整性的新技术

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457887

Norifumi Sasaoka, Takafumi Ochi, M. Oono, C. Ueda, Y. Akiyama, K. Otsuka

{"title":"Novel technology for power and signal integrity using a metal particle conductive layer","authors":"Norifumi Sasaoka, Takafumi Ochi, M. Oono, C. Ueda, Y. Akiyama, K. Otsuka","doi":"10.1109/EPEPS.2012.6457887","DOIUrl":"https://doi.org/10.1109/EPEPS.2012.6457887","url":null,"abstract":"Recently, power integrity (PI) has been the most important technological issue in the field of electronic circuits and systems and has been addressed in important papers using several different approaches [1][2]. The latest concept of the best PI condition is a low impedance between the power and ground lines or planes that can be maintained regardless of the clock frequency, even in the GHz region. This concept was mentioned in a relatively old book [3] from the 1980s, so it is not the newest idea. However, this condition cannot be completely realized using several of the previously proposed approaches, including many involving the use of low-inductance capacitances. We are aware that the electromagnetic interference (EMI) problems of plane power/ground resonance are induced because of the resonance caused by eddy currents or multiple reflections of voltage fluctuations. A novel technology was used in our previous study in which a conductive layer of dispersed metal particles was used instead of a copper plane [4][5]. This structure improved the PI for any clock frequency, particularly in the GHz region, with an impedance of less than 1 Ω. In this study, we examine the electromagnetic wave transmission data in order to investigate the different physical phenomena, and we present some fundamental data on PI and signal integrity (SI). The results indicate that the use of a transmission line with a metal particle conductive layer can yield various changes in the electromagnetic wave transmission speed, such as an increase of 76% or a decrease of 21%. The Z11 values of the power/GND plane test coupon were from 1.8 to 3.0 Ω in the frequency region from 5 to 20 GHz. These results suggest that the metal particle conductive layer has useful characteristics for improving the PI and SI.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127796491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0