2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems最新文献_第8页

Novel technology for power and signal integrity using a metal particle conductive layer 利用金属颗粒导电层实现电力和信号完整性的新技术

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457887

Norifumi Sasaoka, Takafumi Ochi, M. Oono, C. Ueda, Y. Akiyama, K. Otsuka

{"title":"Novel technology for power and signal integrity using a metal particle conductive layer","authors":"Norifumi Sasaoka, Takafumi Ochi, M. Oono, C. Ueda, Y. Akiyama, K. Otsuka","doi":"10.1109/EPEPS.2012.6457887","DOIUrl":"https://doi.org/10.1109/EPEPS.2012.6457887","url":null,"abstract":"Recently, power integrity (PI) has been the most important technological issue in the field of electronic circuits and systems and has been addressed in important papers using several different approaches [1][2]. The latest concept of the best PI condition is a low impedance between the power and ground lines or planes that can be maintained regardless of the clock frequency, even in the GHz region. This concept was mentioned in a relatively old book [3] from the 1980s, so it is not the newest idea. However, this condition cannot be completely realized using several of the previously proposed approaches, including many involving the use of low-inductance capacitances. We are aware that the electromagnetic interference (EMI) problems of plane power/ground resonance are induced because of the resonance caused by eddy currents or multiple reflections of voltage fluctuations. A novel technology was used in our previous study in which a conductive layer of dispersed metal particles was used instead of a copper plane [4][5]. This structure improved the PI for any clock frequency, particularly in the GHz region, with an impedance of less than 1 Ω. In this study, we examine the electromagnetic wave transmission data in order to investigate the different physical phenomena, and we present some fundamental data on PI and signal integrity (SI). The results indicate that the use of a transmission line with a metal particle conductive layer can yield various changes in the electromagnetic wave transmission speed, such as an increase of 76% or a decrease of 21%. The Z11 values of the power/GND plane test coupon were from 1.8 to 3.0 Ω in the frequency region from 5 to 20 GHz. These results suggest that the metal particle conductive layer has useful characteristics for improving the PI and SI.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127796491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Power-bandwidth trade-off on TSV array in 3D IC and TSV-RDL junction design challenges 3D集成电路中TSV阵列的功率带宽权衡及TSV- rdl结设计挑战

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457847

Wei Yao, F. Shi, Lei He, Siming Pan, B. Achkir, Li Li

{"title":"Power-bandwidth trade-off on TSV array in 3D IC and TSV-RDL junction design challenges","authors":"Wei Yao, F. Shi, Lei He, Siming Pan, B. Achkir, Li Li","doi":"10.1109/EPEPS.2012.6457847","DOIUrl":"https://doi.org/10.1109/EPEPS.2012.6457847","url":null,"abstract":"Through-silicon-via (TSV) enables vertical connectivity between stacked chips or interposer and is a key technology for three-dimensional (3D) ICs. In this paper, we study the signal integrity issues of TSV-based 3D IC with high-speed signaling based on 3D electromagnetic field solver and SPICE simulations. Unlike other existing works, our study focuses on an array of TSVs and includes power and bandwidth trade-off between different signaling and termination techniques, such as single-ended, differential and reduced-swing signaling. From our study, to achieve the best power efficiency, unterminated single-ended reduced-swing signaling should be applied, while terminated single-ended signaling can provide the maximum bandwidth. Beyond TSV, critical design challenges for the junction structure between TSVs and RDL traces are also revealed and analyzed. Result shows that at 20GHz, the fanout-like junction structure could cause more than 10dB return loss (S11) degradation when changing TSV pitch from 50μm to 200μm and even contribute more insertion loss (S21) than the TSV itself.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131066504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Comparison of TSV-based PDN-design effects using various stacking topology methods 不同堆叠拓扑方法下基于tsv的pdn设计效果比较

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457848

G. Charles, P. Franzon

引用次数: 5

A new efficient method for modeling dense via arrays with 1D discretization in 2D method of moment and group T matrix 采用二维矩和群T矩阵的一维离散化方法，提出了一种新的高效密孔阵列建模方法

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457868

Xin Chang, L. Tsang

引用次数: 4

An implementation of interleaved microstrip motherboard routing in Multi-Gbps I/O channel margin improvement 多gbps I/O通道余量改进中交错微带主板路由的实现

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457901

Y. J. Tan, H. Heck, J. Kong, W. Tan

引用次数: 0

Ultra-high speed memory bus using microwave interconnects 使用微波互连的超高速存储器总线

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457830

J. Aberle, B. Bensalem

引用次数: 9

Transient analysis of high-speed channels via Newton-GMRES Waveform Relaxation 基于牛顿- gmres波形弛豫的高速通道瞬态分析

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457886

S. Olivadese, Stefano Grivet-Talocia

引用次数: 3

Accurate and efficient computation of power plane pair inductance 功率平面对电感的精确高效计算

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI: 10.1109/EPEPS.2012.6457869

L. Li, A. Ruehli, J. Fan

引用次数: 13