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The Fourth International Conference on Advanced Semiconductor Devices and Microsystem最新文献

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Thermal resistance of the semiconductor structures for a photomixing device 光敏器件用半导体结构的热阻
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088482
J. Darmo, F. Schafer, A. Forster, P. Kordos, R. Gusten
{"title":"Thermal resistance of the semiconductor structures for a photomixing device","authors":"J. Darmo, F. Schafer, A. Forster, P. Kordos, R. Gusten","doi":"10.1109/ASDAM.2002.1088482","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088482","url":null,"abstract":"The thermal resistance of layered semiconductor systems intended to be used for GaAs-based photomixing devices is studied. Layered systems with nonstoichiometric GaAs on the substrate exhibit an increase of thermal resistance of about 33%, while using a thin AlAs/GaAs multilayer structure leads to a thermal resistance only 10% larger than the thermal resistance of the GaAs substrate. The results are discussed with respect to the heat dissipation and implications for the photomixer device.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116726002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Superior-order curvature-correction CMOS smart temperature sensor 高阶曲率校正CMOS智能温度传感器
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088545
C. Popa
{"title":"Superior-order curvature-correction CMOS smart temperature sensor","authors":"C. Popa","doi":"10.1109/ASDAM.2002.1088545","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088545","url":null,"abstract":"The circuit presented in this paper responds to both of the main requirements of a smart temperature sensor: high performance (that is a very good linearity with respect to temperature variations) and a small price per chip (realized by reducing the die area and the interconnection costs). The core of the proposed smart temperature sensor is represented by an exponential curvature-corrected CMOS bandgap reference, with a temperature coefficient of 7.5 ppm/K for an extended temperature range. The entire circuit was implemented in 0.35 /spl mu/m CMOS technology, the analog core occupying a die area of about 70 /spl mu/m /spl times/ 110 /spl mu/m. In order to reduce the interconnection costs and their delays and static errors, an I/sup 2/C interface was on-chip integrated.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115532235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
GMR signal of Co-Ag layered structures in dynamic conditions of measurement GMR信号对Co-Ag层状结构在动态条件下的测量
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088508
V. Áč, B. Anwarzai, S. Luby, E. Majková, R. Senderák
{"title":"GMR signal of Co-Ag layered structures in dynamic conditions of measurement","authors":"V. Áč, B. Anwarzai, S. Luby, E. Majková, R. Senderák","doi":"10.1109/ASDAM.2002.1088508","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088508","url":null,"abstract":"The signal response in layered giant magnetoresistance (GMR) structures is studied in an external ac magnetic field at 50 Hz with an increasing amplitude swing. Co-Ag multilayers (MLs) were evaporated onto Si substrates. The thickness of Co and Ag layers was 1.2 nm and 5.5 nm, respectively. MLs with only N=2, 3, 4 periods were fabricated to expose the relative higher influence of top and bottom ferromagnetic Co layers of ML having a higher density of magnetic flux than the central layers. Experimental results are explained in terms of simulations of inhomogeneous magnetic field distribution in ML. Simulations were performed by an appropriate software tool. The results are of some relevance for the design and applications of smart magnetic GMR sensors.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121078939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High-performance AlGaN/GaN HEMTs on silicon substrates 硅衬底上的高性能AlGaN/GaN hemt
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088526
P. Javorka, A. Alam, A. Fox, M. Marso, M. Heuken, P. Kordos
{"title":"High-performance AlGaN/GaN HEMTs on silicon substrates","authors":"P. Javorka, A. Alam, A. Fox, M. Marso, M. Heuken, P. Kordos","doi":"10.1109/ASDAM.2002.1088526","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088526","url":null,"abstract":"In this work the performance of AlGaN/GaN HEMTs on silicon substrates is presented. Prepared devices exhibit a saturation current of 0.91 A/mm and sustain significantly higher DC power in comparison to devices on sapphire. Markedly lower reduction of I/sub DSs/ and g/sub m,ext/ with increased temperature due to better thermal conductivity of silicon is shown. A unity gain cutoff frequency f/sub T/ of 32 and 20 GHz and a maximum frequency of oscillation of 27 and 22 GHz are obtained for devices with gate lengths of 0.7 and 0.5 /spl mu/m, respectively. These are the highest values reported so far on AlGaN/GaN/Si HEMTs. Presented values are comparable to those known for devices on sapphire and SiC substrates.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126555095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A promising lead-free material for flip-chip bumps: Sn-Cu-RE 一种有前途的无铅倒装芯片碰撞材料:Sn-Cu-RE
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088465
C.M.L. Wu
{"title":"A promising lead-free material for flip-chip bumps: Sn-Cu-RE","authors":"C.M.L. Wu","doi":"10.1109/ASDAM.2002.1088465","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088465","url":null,"abstract":"In advanced electronic packaging, flip-chip (FC) bumps are required to be reliable and inexpensive. The Sn-0.7%Cu alloy has been considered as a lead-free material for FC bumps. Various small amounts of rare earth (RE) elements, which are mainly Ce and La, have been added to the Sn-0.7%Cu alloy to form new alloys. It was found that the new alloys exhibit mechanical properties superior to that of the Sn-0.7%Cu alloy. In particular, the addition of up to 0.5% of RE elements is found to refine the effective grain size and provide a fine and uniform distribution of Cu/sub 6/Sn/sub 5/ in the solidified microstructure. After aging at high temperature, the microstructure of Sn0.7%Cu-0.5%RE alloy is more stable than that of the Sn-0.7%Cu alloy. Tensile, creep and microhardness tests were, conducted on the solder alloys. It was found that significant improvements of the tensile strength and creep resistance were obtained with RE elements addition. These results have made the Sn-Cu-RE alloy to be very attractive as a suitable material for FC bumps.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126359334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Comparison of nonvolatile memory cells for molybdenum gate analog BeCMOS process 钼栅模拟BeCMOS工艺非易失性存储单元的比较
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088520
H. Ronkainen, K. Theqvist
{"title":"Comparison of nonvolatile memory cells for molybdenum gate analog BeCMOS process","authors":"H. Ronkainen, K. Theqvist","doi":"10.1109/ASDAM.2002.1088520","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088520","url":null,"abstract":"Floating gate nonvolatile memory cells fabricated with a molybdenum gate triple well BeCMOS process are described. Programming, endurance and retention characteristics of two types of cells are compared. The first type is programmed through the gate oxide with Fowler-Nordheim tunnelling and the second through the control gate - floating gate silicon nitride dielectric with Frenkel-Poole emission. The measured endurance for both types was more than 10,000 cycles and the estimated retention more than 10 years.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121535796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An analytical heterojunction diode model including the electron transport inside the depletion layer and the breakdown 一种分析异质结二极管模型，包括耗尽层内的电子输运和击穿
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088510
M. Horák
{"title":"An analytical heterojunction diode model including the electron transport inside the depletion layer and the breakdown","authors":"M. Horák","doi":"10.1109/ASDAM.2002.1088510","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088510","url":null,"abstract":"An analytical model that describes the Np/sup +/-heterojunction diode forward and reverse current is presented. The following physical processes at the heterojunction are considered: drift and diffusion with field dependent mobility, recombination, band-to-band tunneling, avalanche multiplication, thermionic-field emission. The resulting formula describes the diode current in the whole extent from forward bias through reverse bias up to breakdown.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134457038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Some possibilities for determining the depth of the p-n junction and profiles of semiconductor layers 确定p-n结深度和半导体层轮廓的一些可能性
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088488
L. Hulényi, R. Kinder
{"title":"Some possibilities for determining the depth of the p-n junction and profiles of semiconductor layers","authors":"L. Hulényi, R. Kinder","doi":"10.1109/ASDAM.2002.1088488","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088488","url":null,"abstract":"Electrochemical capacitance-voltage (ECV) techniques and the four-point probe method have been used to determine the carrier profile N(x) and the depth of the p/sup +/-n junction of a boron implanted silicon wafer. It was found that the p/sup +/-n junction depth can provide reliable information only if certain limitations are considered in detail. The results obtained by ECV were compared with those computed by SUPREM.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124582848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis of I-V measurements on Pt/Au-GaN Schottky contacts in a wide temperature range 宽温度范围内Pt/Au-GaN肖特基触点I-V测量分析
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088530
D. Donoval, V. Kulikov, P. Beno, J. Racko
{"title":"Analysis of I-V measurements on Pt/Au-GaN Schottky contacts in a wide temperature range","authors":"D. Donoval, V. Kulikov, P. Beno, J. Racko","doi":"10.1109/ASDAM.2002.1088530","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088530","url":null,"abstract":"The formerly derived modified method of evaluation of the Schottky barrier height applied on Pt/Au-GaN Schottky structures is presented. It is based on the measurement of I-V characteristics in a wide temperature range. By subtraction of generation-recombination, tunnelling and leakage currents from the total current, the \"pure\" thermionic emission current I/sub te/ and subsequently Schottky barrier height /spl phi//sub b/ can be evaluated with higher physical relevance. The advantage of the mentioned method is that it allows evaluation of /spl phi//sub b/ from the measured I-V characteristics which significantly deviate from the ideal thermionic-emission characteristics represented in semi-logarithmic coordinates by a straight line. The determination of the Schottky barrier ob on GaN and related compound semiconductors with higher precision is important for further analysis of new combinations of metals and semiconductors and better understanding of the physical behaviour at the interface.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117153271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling of the inverse base width modulation effect in SiGe base HBT for circuit simulation SiGe基极HBT反基宽调制效应的电路仿真建模
The Fourth International Conference on Advanced Semiconductor Devices and Microsystem Pub Date : 2002-12-16 DOI: 10.1109/ASDAM.2002.1088503
T. Pesic, N. Jankovic, J. Karamarković
{"title":"Modeling of the inverse base width modulation effect in SiGe base HBT for circuit simulation","authors":"T. Pesic, N. Jankovic, J. Karamarković","doi":"10.1109/ASDAM.2002.1088503","DOIUrl":"https://doi.org/10.1109/ASDAM.2002.1088503","url":null,"abstract":"We describe the method of including the inverse base width modulation (IBWM) effect in the non-quasi static SiGe base HBT circuit model. Simulated results reveal that the IBWM effect has strong influence on the HBT electrical characteristics and must be taken into account for accurate modeling of SiGe HBTs.","PeriodicalId":179900,"journal":{"name":"The Fourth International Conference on Advanced Semiconductor Devices and Microsystem","volume":"164 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115173068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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