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2018 4th International Conference on Devices, Circuits and Systems (ICDCS)最新文献

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Fabrication and Characterization of PLD Deposited Crystalline Zno as Channel and Amorphous Zno as Gate Dielectric of the Thin Film FET PLD沉积薄膜场效应管的晶状Zno沟道和非晶状Zno栅极介质的制备与表征
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605144
S. Babu, D. Moni, Paul John Padickala, J. Azariah, S. Rajesh
{"title":"Fabrication and Characterization of PLD Deposited Crystalline Zno as Channel and Amorphous Zno as Gate Dielectric of the Thin Film FET","authors":"S. Babu, D. Moni, Paul John Padickala, J. Azariah, S. Rajesh","doi":"10.1109/ICDCSYST.2018.8605144","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605144","url":null,"abstract":"The pulsed laser deposited crystalline and amorphous zinc oxide thin-films for field effect transistor (FET) were investigated. The deposited layers of channel and gate dielectric are formed with significant uniformity and better stoichiometry with PLD. The thin-film sample annealed at 400°C, becomes crystalline, which is used for the channel and the as-deposited amorphous sample used as a gate dielectric layer in MOSFET. The material compositional, structural and surface morphological studies were carried out using X-Ray Diffraction and Atomic Force Microscopy respectively. The complex impedance analysis of fabricated FET was analyzed between source to gate and source to drain. The Current – Voltage (I-V) transfer and output characteristics of fabricated FET was analyzed using National Instruments PXI-4100.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115669323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
MLR Model Based Sensor Reduction For Remote Cr6 Detector 基于MLR模型的远程Cr6探测器传感器约简
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605156
K. Krishnan, P. Bhuvaneswari
{"title":"MLR Model Based Sensor Reduction For Remote Cr6 Detector","authors":"K. Krishnan, P. Bhuvaneswari","doi":"10.1109/ICDCSYST.2018.8605156","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605156","url":null,"abstract":"Clean drinking water is essential for healthy living. The main objective of this research is to design an Internet of Things (IoT) based water quality monitoring device for detection of the Hexavalent Chromium (Cr6) in drinking water. pH, TDS and conductivity are the major Water Quality Parameters (WQPs) measured for the determination of the quality of water. In this research, the impact of contaminant concentration on WQPs was analyzed using Linear Regression Model for determination of the concentration of Cr6 in the real time sample. The above WQPs were measured for synthesized Cr6 contaminated samples. The measurement was made for varied concentrations of the samples. A customized database was created from the above measurement. In order to reduce the number of WQPs involved in detection, dependency analysis between the parameters and chromium concentration was made. Further, the relative factors among the parameters were computed. The inference drawn from the analysis is that the estimation of Cr6 contaminant concentration using TDS and conductivity results in 90% accuracy when compared to pH for all the four synthesized Cr6 samples.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121769014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Simulation Based Breakdown Voltage Analysis Of 3-Step Field Plate AlGaN/GaN HEMTs 基于仿真的三阶场极板AlGaN/GaN hemt击穿电压分析
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605150
Neha, V. Kumari, Mridula Gupta, M. Saxena
{"title":"Simulation Based Breakdown Voltage Analysis Of 3-Step Field Plate AlGaN/GaN HEMTs","authors":"Neha, V. Kumari, Mridula Gupta, M. Saxena","doi":"10.1109/ICDCSYST.2018.8605150","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605150","url":null,"abstract":"The behavior of 3-step field plate High Electron Mobility Transistor (HEMT) structure under the influence of parameter variation like gate to drain length, length of third step of field plate, permittivity of spacer and oxide region etc. has been examined in this work using extensive ATLAS TCAD device software. The device breakdown voltage increases with increase in gate to drain distance. However marginal degradation in breakdown voltage with other device parameter is observed. With the change in spacer permittivity, significant enhancement in drain current is achieved with marginal change in breakdown voltage. Results shows that asymmetric Field Plate AlGaN/GaN HEMT device (i.e., higher gate to drain length than source to gate) offer higher breakdown voltage. It was also observed that, source side field plate configuration results in higher breakdown voltage as compared to drain side field plate.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"194 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128204785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Miniaturization of Monopole Antenna with Modified Ground for Wi-Fi Applications 用于Wi-Fi应用的改良接地单极天线小型化
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605121
P. S. Silpa, S. Bhuvana Nair, S. Menon
{"title":"Miniaturization of Monopole Antenna with Modified Ground for Wi-Fi Applications","authors":"P. S. Silpa, S. Bhuvana Nair, S. Menon","doi":"10.1109/ICDCSYST.2018.8605121","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605121","url":null,"abstract":"The paper proposes novel design of a monopole antenna energized using Coplanar Waveguide (CPW). The ground plane of the antenna is modified as a loop which enables better reflection and radiation characteristics along with appreciable size reduction in comparison with conventional CPW fed monopole antenna. The proposed system analyzed and optimized using ANSYS HFSS. The optimized compact antenna structure is fabricated and tested using Vector Network Analyser.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132872437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Parametric study of stub loaded loop resonator 短段负载环谐振器的参数化研究
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605074
Baby Sreeja S.D., Betsy George, S. Menon
{"title":"Parametric study of stub loaded loop resonator","authors":"Baby Sreeja S.D., Betsy George, S. Menon","doi":"10.1109/ICDCSYST.2018.8605074","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605074","url":null,"abstract":"In the current trends of RF and microwave developments, it became increasingly important to remove unwanted signals so that the information in the signal is clear. A filter does this and the paper proposes a compact stub loaded band stop filter which can be turned for a range of frequencies without changing the foot print of the filter. An edge coupled stub loaded band stop filter with cover type feed is presented here. For validation of these concepts, a band stop filter operating in S band has been designed, simulated, fabricated and tested.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"31 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132237479","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient Vedic Signed Digit Decimal Adder 高效的吠陀符号十进制加法器
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605072
G. Sreelakshmi, Mohammed Salman, K. Fatima, B. Madhavi
{"title":"Efficient Vedic Signed Digit Decimal Adder","authors":"G. Sreelakshmi, Mohammed Salman, K. Fatima, B. Madhavi","doi":"10.1109/ICDCSYST.2018.8605072","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605072","url":null,"abstract":"Decimal arithmetic is convenient for financial calculations and other database manipulations as compared to binary arithmetic. Research is still going on to have specialized decimal arithmetic hardware processing units to make these tasks more efficient in terms speed, power and hardware to supports these applications. In this paper, we propose a new approach to decimal addition that is simple in concept, appealing and efficient in terms of speed and hardware. The proposed decimal adder utilises a signed 2's complement vinculum representation of the decimal numbers. The design although generates a dual carry, i.e., a positive and a negative carry, analysis of the adder has revealed a much lower probability of carry generation as compared to the conventional decimal adder allowing the possibility of parallel decimal addition. The proposed VBCD adder is tested up to 16-digit on vertex 6 FPGA platform and also on 180 nm Cadence digital Encounter Tools","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114292476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Prototypes of body worn microstrip patch antennas for biomedical applications operating in the ISM frequency band 用于生物医学应用的微带贴片天线原型，工作在ISM频段
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605143
J. Weiler, M. Nesasudha, T. Neebha
{"title":"Prototypes of body worn microstrip patch antennas for biomedical applications operating in the ISM frequency band","authors":"J. Weiler, M. Nesasudha, T. Neebha","doi":"10.1109/ICDCSYST.2018.8605143","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605143","url":null,"abstract":"Antennas for biomedical applications have become a prevalent technology in modern healthcare services. Disease prevention, sensoring and monitoring of medical issues and physiological data and minimal-invasive medical device application are just a few of the advantages of antenna usage. For this purpose a miniaturized and biocompatible antenna is needed. The aim of this project is to design and simulate a simple, versatile rectangular microstrip patch antenna with included meander structures, meeting the requirement of the Industrial, Scientific and Medical (ISM) frequency band (2.4 – 2.5 GHz) for biomedical application on human skin. Here the design of the antennas using a trial and error method executed with the computational electromagnetics software FEKO (Altair Engineering, Inc., Michigan, US) is shown. Furthermore a few preliminary antenna performance results are presented. The resulting microstrip patch antenna meets the requirements operating in the ISM frequency band and has a flexible and miniaturized design. Implications on the human body have to be simulated with a canonical phantom of the human skin in prospective steps.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114323413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Designed & Comparison of Reliability Analysis in 6T & 5T SRAM Cell 6T和5T SRAM单元可靠性分析的设计与比较
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605164
A. Kumar, B. S. Akashe
{"title":"Designed & Comparison of Reliability Analysis in 6T & 5T SRAM Cell","authors":"A. Kumar, B. S. Akashe","doi":"10.1109/ICDCSYST.2018.8605164","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605164","url":null,"abstract":"Temporary reduction VLSI IC silicon technology is an important factor for the scale of reliability problems. The instability of the Negative Bias Temperature Instability (NBTI), Positive Bias Temperature Instability (PBTI), Hot-Carrier Injection (HCI) and different Models are particularly severe problem during operation of the electronic circuit. This document describes the impact mechanism and another NBTI, PBTI& HCI distribution coefficient that degrades NBTI, PBTI & HCI performance. The expression analysis of the Reliability models is based on various characteristics of the solution spread of the model developed by the researcher. For NBTI, PBTI, HCI and Models performance of 6T and 5T SRAM, this method can be used to counteract the effect of PMOS NBTI degradation, NMOS PBTI degradation and HCI on both which is described in more detail below.. Certain manufacturing processes can cause destruction inactivity leading to short circuit life. In research for NBTI PBTI and HCI degradation on 6T and 5T SRAM, the draft strategy provides the effect of improving the performance of 6T and 5T SRAM. This 6T and 5T SRAM is subject to temperature and pressure stress conditions, in particular degradation appears in the device parameters. In this paper we found the degradation of 6T and 5T SRAM up to 10 years and compared the results to find effectiveness in both SRAM’s. The simulation work is done using 45nm technology in virtuoso cadence.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"11 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133205600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Thickness optimization for Intercalation doped Multilayer Graphene Nanoribbon Interconnects 掺杂多层石墨烯纳米带互连层厚度优化
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605127
B. Kumari, Manodipan Sahoo
{"title":"Thickness optimization for Intercalation doped Multilayer Graphene Nanoribbon Interconnects","authors":"B. Kumari, Manodipan Sahoo","doi":"10.1109/ICDCSYST.2018.8605127","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605127","url":null,"abstract":"In this paper, thickness of Multilayer Graphene Nanoribbon (MLGNR) interconnects is optimized by minimizing the crosstalk delay and noise parameters for intermediate and global level interconnects at 11nm technology node by utilizing the ABCD parameter based model. It is observed that the optimum thickness by minimizing the crosstalk induced delay is 15 nm and 30 nm for perfectly and nearly specular (i.e specularity index, P=1 and 0.8 respectively) intermediate and global level MLGNR interconnects respectively. As far as noise contribution is considered, completely and nearly specular MLGNRs have better immunity to noise when their thickness is less than 15 nm and 175 nm for intermediate and global level respectively. When compared to Cu, fully and nearly specular MLGNRs outperform Cu in terms of delay, noise width and noise area for both intermediate and global level but in terms of peak noise Cu is better than MLGNRs.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115493847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Feature Extraction and Matching using Gabor wavelets and Hessian detector 基于Gabor小波和Hessian检测器的特征提取与匹配
2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-01 DOI: 10.1109/ICDCSYST.2018.8605177
C. Shravani, N. Balaji
{"title":"Feature Extraction and Matching using Gabor wavelets and Hessian detector","authors":"C. Shravani, N. Balaji","doi":"10.1109/ICDCSYST.2018.8605177","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605177","url":null,"abstract":"The research work involves the use of two dimensional Gabor wavelets in image processing. The key idea is to utilize a Gabor wavelet as a feature extractor. By using Gabor wavelets the image is reconstructed and required features are only represented. The corners of the input image are obtained and are matched to that of the rotated image of the input. A powerful feature extractor Hessian interest point detector is compared to detectors like Derivative of Gaussian function. Most of research applications like navigation, tracking, optical flow demand perfect feature extraction and matching though the image is rotated. In the present work while capturing the image the camera is calibrated at an angle of 25 °. It is observed that the features can be perfectly extracted even after the rotation of the images. A real-time system can be developed by implementing the proposed approach on a SoC and hence the area, power and delay can be optimized","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132468031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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