2018 4th International Conference on Devices, Circuits and Systems (ICDCS)最新文献

A Comparative Study of Pulse Triggered Flipflops 脉冲触发触发器的比较研究

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605145

Naman Gupta, P. Goyal, Kavindra Kandpal, K. R. Teja

引用次数: 0

Comparison of Braun Multiplier and Wallace Multiplier Techniques in VLSI VLSI中Braun乘法器与Wallace乘法器技术之比较

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605173

S. P, Aijaz A. Khan

{"title":"Comparison of Braun Multiplier and Wallace Multiplier Techniques in VLSI","authors":"S. P, Aijaz A. Khan","doi":"10.1109/ICDCSYST.2018.8605173","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605173","url":null,"abstract":"In this paper the concept that is used is power efficient multipliers which are very important part of all VLSI system design which provides High speed with low power consumption which are the key requirements for any VLSI design. This paper proposes an efficient implementation of a high speed with low power multiplier using shift and adds methods and this paper presents the implementation of Braun multiplier and Wallace Multiplier using Cadence (Encounter) RTL Complier with simulation which includes creating the Test circuit for each block that is combined together which forms Multiplier. In this paper, Braun Multiplier and Wallace multiplier are simulated by creating the schematic circuit for each of the building blocks such as the AND gate, OR gate, NOT gate, EXOR gate, Half Adder, Full adder and are tested using a test circuit for each of the above blocks. These test circuits are simulated and synthesized using the Cadence tool. Symbol for these building blocks are generated and are called to construct the structure of Braun Multiplier and Wallace Multiplier. Then the multipliers are compared with respect to the number of transistors used which will provide the area occupied and power consumed. Cadence software is used to implement the schematic circuits of each block and all the blocks are simulated using cadence tool and also symbols are created which are assembled together to form a test circuit and all the analysis are tested and also synthesized using Cadence","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123783570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Demonstration of Bias Dependence of Tunnel Magnetoresistance in Co-MgO-Co Magnetic Tunnel Junctions using First Principles Calculations 用第一性原理计算证明Co-MgO-Co磁性隧道结中隧道磁电阻的偏置依赖性

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605118

M. Chakraverty, P. Harisankar

{"title":"Demonstration of Bias Dependence of Tunnel Magnetoresistance in Co-MgO-Co Magnetic Tunnel Junctions using First Principles Calculations","authors":"M. Chakraverty, P. Harisankar","doi":"10.1109/ICDCSYST.2018.8605118","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605118","url":null,"abstract":"This paper reports the bias dependence of tunneling magnetoresistance in Co-MgO-Co magnetic tunnel junctions (MTJs) using first principles SGGA band structure calculations at four different temperatures. The Co-MgO-Co tunnel junction has been simulated at four different temperatures to obtain the I-V and dI/dV-V characteristics with parallel and anti-parallel magnetization states, respectively. The TMR ratios have been computed at all four different temperatures. It is seen that temperature doesn't seem to greatly fluctuate the TMR ratios of this magnetic tunnel junction, thereby making it suitable for applications over a wide range of temperatures. For the same four temperatures, the tunnel junction has been simulated for increasing insulator thicknesses. The exponential increase in resistance in both parallel and antiparallel magnetization states has been observed with an increase in the insulating layer thickness. The effect of increasing insulator thicknesses on the TMR ratios at all the four temperatures has also been presented in this paper. The demonstration of bias dependence of tunneling magnetoresistance presented in this paper aptly justifies the application of Co-MgO-Co MTJs in Magnetoresistive Random Access Memories.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"436 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132830649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A Smart Healthcare Monitoring System Using Smartphone Interface 基于智能手机接口的智能医疗监控系统

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605142

Akshat, Gaurav, Zahid, Bhupendra, Aditi, Sachin Kumar, Maneesha, P. Pandey

{"title":"A Smart Healthcare Monitoring System Using Smartphone Interface","authors":"Akshat, Gaurav, Zahid, Bhupendra, Aditi, Sachin Kumar, Maneesha, P. Pandey","doi":"10.1109/ICDCSYST.2018.8605142","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605142","url":null,"abstract":"The present work proposes an efficient architecture of a smart health care monitoring framework using sensors and Internet of Things. With 1: 1674 doctor-patient population ratio in India, the shortage of health providers and infrastructure is the most acute in rural areas. The paper presents an efficient model wherein a doctor can monitor the health of the patient from a remote location through the efficient use of technology, thereby addressing this shortage of healthcare personal in Indian scenario. In the proposed system, the vital health parameters like Electrocardiograph (ECG), Body Temperature, Blood Pressure (BP), Heart Beat rate, Glucose Level Detection and Galvanic Skin Response of patient are collected and evaluated through the use of smart devices. The data is further transmitted wirelessly through Zigbee IEEE 801.15.4 technology for further analysis using data analytics. Next the android application of the system displays this data about vital statistics on a Smartphone of a doctor enabling him to receive the current status of the patient without being physically present there. Whenever there is a variation in any physiological parameter of a patient beyond a pre-assigned threshold value, an automated notification will pop up in doctors’ android mobile application. Hence the present IOT based smart health care monitoring system enables the remote monitoring of medical parameters along with the tracking of medical equipments leading to smart hospital services.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133077018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 21

Impact of High-k spacer and Negative Capacitance on Double Gate Junctionless Transistor for Improved Short Channel Immunity and Reliability 高k间隔和负电容对双栅无结晶体管提高短通道抗扰度和可靠性的影响

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605167

Hema Mehta, H. Kaur

引用次数: 1

Optimization of Gate Oxide of Dual-Gate MISHEMTs for Enhanced DC performance 优化双栅MISHEMTs的栅极氧化物以提高直流性能

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605124

Preeti Singh, V. Kumari, M. Saxena, Mridula Gupta

{"title":"Optimization of Gate Oxide of Dual-Gate MISHEMTs for Enhanced DC performance","authors":"Preeti Singh, V. Kumari, M. Saxena, Mridula Gupta","doi":"10.1109/ICDCSYST.2018.8605124","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2018.8605124","url":null,"abstract":"In this paper, simulation study has been carried out to evaluate the impact of high-k gate dielectric on DC performance of Dual-Gate MISHEMTs. Comparison of different gate dielectrics and gate stacks such as $mathrm {S}mathrm {i}_{3}mathrm {N}_{4}, mathrm {A}1_{2}mathrm {O}_{3}, mathrm {H}mathrm {f}mathrm {O}_{2}, mathrm {A}1_{2}mathrm {O}_{3}/mathrm {S}mathrm {i}_{3}mathrm {N}_{4}, mathrm {H}mathrm {f}mathrm {O}_{2}/mathrm {S}mathrm {i}_{3}mathrm {N}_{4}$ and $mathrm {H}mathrm {f}mathrm {O}_{2}/mathrm {A}1_{2}mathrm {O}_{3}$ has been presented. Threshold voltage shift of 10.6% has been observed for $mathrm {H}mathrm {f}mathrm {O}_{2}/mathrm {A}1_{2}mathrm {O}_{3}$ gate dielectric stack for DG-MISHEMT if interface charge density were varied from $4.6times 10^{12}mathrm {c}mathrm {m}^{-2}$ to $8times 10^{12}mathrm {c}mathrm {m}^{-2}$ and this shift is minimum as compared to other gate stacks combinations like $mathrm {A}1_{2}mathrm {O}_{3}/mathrm {S}mathrm {i}_{3}mathrm {N}_{4}$ or $mathrm {H}mathrm {f}mathrm {O}_{2}/mathrm {S}mathrm {i}_{3}mathrm {N}_{4}$. Also, threshold voltage change is marginal with different stack thickness variation. Simulations were carried out using ATLAS module of SILVACO TCAD tool at ambient temperature.","PeriodicalId":175583,"journal":{"name":"2018 4th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130583519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Implementation of Efficient Mix Column Transformation for AES encryption AES加密中高效混合列变换的实现

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605077

S. Sridevi sathya priya, M. Junias, S. Sarah Jenifer, A. Lavanya

引用次数: 0

Review of Full Adder Performance Analysis Using Kogge Stone Adder and Magnetic Tunnel Junction Kogge石加法器与磁隧道结全加法器性能分析综述

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605064

R. James, Ajith Ravindran

引用次数: 1

Performance Analysis of GaSb/InAs Tunnel FET for Low Power Applications 低功耗GaSb/InAs隧道场效应管的性能分析

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605119

D. Moni, A. Anucia, D. Gracia, D. Nirmal

引用次数: 2

Sensor Networks based Water Quality Monitoring Systems for Intensive Fish Culture -A Review 基于传感器网络的集约化养鱼水质监测系统综述

2018 4th International Conference on Devices, Circuits and Systems (ICDCS) Pub Date : 2018-03-16 DOI: 10.1109/ICDCSYST.2018.8605146

S. R. Jino Ramson, Deepthi Bhavanam, Srirupa Draksharam, anjeet Kumar, D. Jackuline Moni, A. Alfred Kirubaraj

引用次数: 12