2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)最新文献

{"title":"Laser Integration on Silicon through Flip-chip Bonding with Efficient Coupling","authors":"Ting-Ta Chi, Nanxi Li, H. Cai, Zhenyu Li, Landobasa Y. M. Tobing, Haitao Yu, L. Lee, W. Lee","doi":"10.1109/EPTC56328.2022.10013178","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013178","url":null,"abstract":"Integrated silicon photonics technology has wide applications including communication and sensing. It enables high-capacity data transmission in modern communication systems. In the meanwhile, light source integration on silicon remains to be a challenge to overcome. To achieve laser integration on silicon photonics platform with efficient coupling, in this work, a concept for integration of semiconductor laser on silicon wafer through flip-chip bonding with precise control on vertical direction (Z direction) is proposed. High vertical alignment precision of ± 50 nm can be obtained by a developed selective etching process using an etch stop layer. Furthermore, by using a multi-tip edge coupler, the horizontal misalignment tolerance with flip-chip bonded laser can be improved, with an estimated 1-dB horizontal misalignment tolerance of $0.6 mumathrm{m}$ obtained from calculation at 1310 nm (O-band). The work paves the way towards efficient electronic-photonic heterogeneous integration.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125464192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Time-Domain Reflectometry Analysis on Low Impedance Marginal Failure and multi-chip Modules","authors":"Leena Saku, Rahul Babu Radhamony, Andrea Soriano, Grace Tan, Y. Shang","doi":"10.1109/EPTC56328.2022.10013181","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013181","url":null,"abstract":"Open /short localization was easily done with conventional time domain reflectometry (TDR), but when it comes to resistive short or partial / resistive opens, there is still difficulty in locating the fault due to the nature of defect. EOS (electro-optic sampling) based TDR was used in the analysis of a temperature-dependent failure and an intermittent failure in the case studies. The results showed accurate detection of the defect location to substrate via or copper pillar. Additionally, this technique was used in the analysis of very long trace without significant signal loss to detect an artificially created fault in a large multichip module.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126650737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Reliability of lead-free solders for die attach in automotive power modules","authors":"B. Ottinger, Joshua Holverscheid, Sebastian König, Edgar Jerichow, Sebastian Lunz, M. Sprenger, Lars Müller, C. Goth, J. Franke","doi":"10.1109/EPTC56328.2022.10013246","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013246","url":null,"abstract":"Four Sn- based solder joint materials SAC305, SnSb5, SnSb10 and PFDS400® were compared conducting active power cycling tests. In addition, the microstructure before and after the power cycling test was analyzed. Intermetallic compounds were detected at all tested solders after the soldering process. The composition and the amount of intermetallic compound (IMC) phases differed between the solders. The PFDS400® solder joint which consisted mostly of Cu6Sn5 intermetallic compound and an intermediate copper layer showed the highest lifetime followed by SnSb5, SnSb10 and SAC305 solder. While SAC305, SnSb5 and SnSb10 failed due to material fatigue, the PFDS400® solder joint did not show any cracks, damage, or delamination.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"9 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121000905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Molecular Dynamics Study on Plasma-Surface Interactions of SiCN Dielectrics for Wafer-to-Wafer Hybrid Bonding Process","authors":"S. Hahn, Woo Jun Kim, D. Shin, Yong-Hui Lee, Wonyoung Choi, Bumki Moon, Kyeonbin Lim, M. Rhee","doi":"10.1109/EPTC56328.2022.10013205","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013205","url":null,"abstract":"Recently, Cu/dielectric hybrid bonding process is receiving a significant amount of attention as a novel technology to three-dimensionally (3D) integrate next generation devices of fine pitch (sub- $mumathrm{m}$) interconnects. Among various dielectric material candidates for hybrid bonding, SiCN has been greatly considered due to its applicabilty as Cu diffusion barrier layer and reliable mechanical strength that endures chemical mechanical planarization (CMP) process. While the purpose of hybrid bonding is to establish a robust connection between the metal pads, dielectric surface layer plays a crucial role in providing reliable bonding strength to sustain Cu pads until adequate grain growths are achieved during the thermal annealing process. Thus, understanding the plasma-surface interactions of the dielectrics is essential to elucidate the surface activation mechanisms that consequently leads to the bonding quality. In this work, we present a new approach of investigating the plasma-surface interactions using atomic-scale simulation. We established a procedure to derive SiCN surface model based on the surface information and generated three different surface models according to the C/N atomic composition ratio of 0.5, 1 and 2. A series of molecular dynamics (MD) simulations that imitates plasma treatment process were performed on these surface structures to determine the state of O2 plasma activated surfaces and to figure out if there are any correlation between atomic compositions of SiCN dielectrics with the degree of surface activation, which in this work quantified by the surface areal density of SiOH. Another sets of MD simulations were performed to propose a method for promoting surface hydroxylation, which was to include OH species during the plasma treatment process step. Our simulation results indicate that surface activation can successfully be facilitated by the implication of OH species without deteriorating the surface roughness which is also an important surface feature that is known to affect the overall bonding quality. The atomistic insight we presented in this work can provide thorough understanding of SiCN dielectric surface activation process. In addition, the computational approach and procedures we proposed could be an effective measure to examine novel concepts for process development without the time and expense constraints of trial-and-error based experimental approach.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127482493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Process Development and Integration for Wafer-to-Wafer Hybrid Bonding","authors":"Hongyu Li, H. Ji, G. Chen, Alfred Neo Siang Kiat, Teo Wei Jie Dickson, K. Chui","doi":"10.1109/EPTC56328.2022.10013123","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013123","url":null,"abstract":"Three wet clean processes within conventional BEOL line were evaluated for the hybrid bonding. Global oxide uniformity requirement was found out within hybrid bonding process development. Effects of annealing temperature on the Cu bonding pad and oxide surface were studied. Electrical connection through TSV and hybrid bonding pads was demonstrated.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121828453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Eye Diagram Analysis with Deep Neural Networks for Signal Integrity Applications","authors":"Miao Weiyang, Chuan Seng Tan, M. D. Rotaru","doi":"10.1109/EPTC56328.2022.10013173","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013173","url":null,"abstract":"To facilitate the design for signal integrity in interconnect networks, this study explores the application of a deep neural network called convolutional neural network in eye diagram recognition. A multi-module memory bus interconnect structure is built and simulated. The eye diagrams for different types of signal impairments are generated using the ADS circuit model and used as the training data for convolutional neural network. Three basic signal impairments and their combinations were studied in the experiment. The results validate that the CNN model developed in this work can accurately identify the types of signal impairments and even locate the position of the signal impairments. Machine learning can also improve the eye diagram metrics with the help of linear regression algorithm.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123291755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Impact of Environment Humidity on WS Paste Characteristics","authors":"Zhang Rui Fen, Lim Chze Min Jason, Yam Lip Huei, B. S. Kumar, S. Murali, Z. Wen, SS Kang Sungsig, Chan Li-san","doi":"10.1109/EPTC56328.2022.10013151","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013151","url":null,"abstract":"This present study focused on the impact of the environment humidity on the rheology change of water soluble paste over stencil life test. In parallel, this research work also studied the impact of the environment humidity on the solder ability change of the paste after experiencing some periods of exposure to the different environment humidity. The influence of the environment humidity on paste solder ability was evaluated and characterized by the results of reflowing solder paste at small open pad (008004) and small components (01005) on both OSP and ENIG finish. For a further and deeper understanding about the effect of the environment on the paste solderability, additional test was conducted under N2 atmosphere as a contrast to verify the mechanism proposed. It was found that, the environment humidity and the time exposed and the presence of oxygen in the environment and the substrate finish factors all are crucial to affect the resulting performance of the paste solder ability. Lastly, the mechanism of how these factors working together to impact the paste performance was proposed.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123833060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Delamination between dielectric layers of FOPLP due to copper residue under high temperature storage conditions","authors":"Yeonseop Yu, J. Ha, Mijin Park, Eunju Yang, Miyang Kim","doi":"10.1109/EPTC56328.2022.10013189","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013189","url":null,"abstract":"The fan-out panel level package (FOPLP) has its advantage of higher throughput over the fan-out wafer level packages (FOWLP) due to its bigger panel size. It is, however, difficult to maintain uniform quality throughout the panel and secure reliability because there are multiple redistribution layers (RDL) of organic dielectric layers and copper (Cu) conducting paths. In particular, adhesion at various interfaces such as polymer-polymer, polymer-metal, and metal-metal is of great concern because both polymer, and Cu are vulnerable to oxidation at high temperatures in the atmospheric environment. In the present study, we investigated the influence of Cu residue on the degradation of interfacial adhesion in FOPLP under high temperature storage (HTS) conditions. The microstructure and chemistry at the interface were studied using a focused ion beam (FIB) and a transmission electron microscope (TEM). We found that trace amounts of Cu residues prevented two polymers from intermingling during lamination, which is evidenced by accumulation of organosilicon compounds at the interface. We also observed that cracks occurred at the polymer-polymer interface where the Cu residues were present after the HTS test. We propose that the Cu residues should be related to oxidation of polymers at the interfaces during the HTS test and subsequent interfacial delamination.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129636525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Line Edge Roughness Optimization of Photonics Components in Electronics Photonics Heterogeneous Integration","authors":"Arvind Sundaram, Tew Ching Khang, Tan Guo Wei, Haitao Yu, B. C. Chandra Rao, Navab Singh","doi":"10.1109/EPTC56328.2022.10013128","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013128","url":null,"abstract":"This paper aims at optimizing the line edge roughness (LER) profile for photonics waveguide patterns using 12” immersion lithography. For simplicity of implementation, LER is tuned by varying the illumination source profile and optimizing development recipe without making any chemical changes. The optimized illumination setting and development recipe, delivered improved critical dimension uniformity (CDU) of ≥97% along with LER of ≤5% of waveguide CD. Major improvement in LER is obtained with the change in illumination source profile from high partial coherence (high-σ) annular, conventionally used off-axis illumination to achieve high resolution, to low partial coherence (low-σ) on-axis. The optimized conditions are suitable for heterogeneous integration of low loss photonics components with electronics for developing an opto-electronics system at wafer level.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132691898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Tunable Etch Profile for Scandium Doped Aluminum Nitride Piezoelectric Film","authors":"Quek Zhan Jiang, Lin Huamao, Tsang Yat Fung, B. C. Rao","doi":"10.1109/EPTC56328.2022.10013133","DOIUrl":"https://doi.org/10.1109/EPTC56328.2022.10013133","url":null,"abstract":"Scandium-doped Aluminum Nitride ($text{Sc}_{mathrm{x}}text{Al}_{1-mathrm{x}}mathrm{N}$) is reported to have attractive piezoelectric, pyroelectric and electro-optic properties with increased Sc concentration. However, high Sc concentration poses challenges, such as, lower etching rate, sidewall redeposition, and severe mask erosion during etching process. A Design of Experiments (DOE) was conducted to explore the etch sidewall tunability of the $text{SC}_{0.2}text{Al}_{0.8}mathrm{N}$ film using an ICP plasma etch system. Key process parameters include chlorine/argon ratio, platen bias power and process pressure. For isolated patterns, generally required for MEMS devices such as PMUT, sidewall angle could be tuned from ~20° (super tapered) to 65° (relatively vertical). The tunability of the etch profile is attributed to the plasma constituents and sidewall byproduct redeposition.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129788057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}