低阻抗边际失效和多芯片模块的时域反射分析

Leena Saku, Rahul Babu Radhamony, Andrea Soriano, Grace Tan, Y. Shang
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引用次数: 0

摘要

传统的时域反射法(TDR)可以很容易地进行开/短定位,但对于电阻性短或部分/电阻性开,由于缺陷的性质,仍然难以定位故障。在案例研究中,基于EOS(电光采样)的TDR用于分析温度相关故障和间歇性故障。结果表明,通过铜柱可以准确地检测到基体的缺陷位置。此外,该技术还用于分析无显著信号损失的很长的迹线,以检测大型多芯片模块中人为制造的故障。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Time-Domain Reflectometry Analysis on Low Impedance Marginal Failure and multi-chip Modules
Open /short localization was easily done with conventional time domain reflectometry (TDR), but when it comes to resistive short or partial / resistive opens, there is still difficulty in locating the fault due to the nature of defect. EOS (electro-optic sampling) based TDR was used in the analysis of a temperature-dependent failure and an intermittent failure in the case studies. The results showed accurate detection of the defect location to substrate via or copper pillar. Additionally, this technique was used in the analysis of very long trace without significant signal loss to detect an artificially created fault in a large multichip module.
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